aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/mm/proc-arm7tdmi.S
diff options
context:
space:
mode:
authorHyok S. Choi <hyok.choi@samsung.com>2006-09-26 17:36:37 +0900
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-09-27 17:34:30 +0100
commitf12d0d7c7786af39435ef6ae9defe47fb58f6091 (patch)
tree03361f2b925754f2acf4f311df2122f844d3d4fe /arch/arm/mm/proc-arm7tdmi.S
parentfefdaa06ccdde394be865ed76509be82813e425b (diff)
[ARM] nommu: manage the CP15 things
All the current CP15 access codes in ARM arch can be categorized and conditioned by the defines as follows: Related operation Safe condition a. any CP15 access !CPU_CP15 b. alignment trap CPU_CP15_MMU c. D-cache(C-bit) CPU_CP15 d. I-cache CPU_CP15 && !( CPU_ARM610 || CPU_ARM710 || CPU_ARM720 || CPU_ARM740 || CPU_XSCALE || CPU_XSC3 ) e. alternate vector CPU_CP15 && !CPU_ARM740 f. TTB CPU_CP15_MMU g. Domain CPU_CP15_MMU h. FSR/FAR CPU_CP15_MMU For example, alternate vector is supported if and only if "CPU_CP15 && !CPU_ARM740" is satisfied. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/proc-arm7tdmi.S')
0 files changed, 0 insertions, 0 deletions