diff options
author | Nicolas Pitre <nico@org.rmk.(none)> | 2005-05-05 23:24:45 +0100 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2005-05-05 23:24:45 +0100 |
commit | 4b0e07a5566a4e3f141e52c1f17e683e4a5bba91 (patch) | |
tree | 4a2f67e6cb6ea665c6d45529a5b7c61ac255663d /arch/arm/mm | |
parent | f7e68bbf405a45d6e7c5b8fc384ff1ba20dd7aa4 (diff) |
[PATCH] ARM: 2663/1: straightify TLS register emulation a bit more
Patch from Nicolas Pitre
This better express things, and should cover RMK's weird SMP toys.
Signed-off-by: Nicolas Pitre
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm')
-rw-r--r-- | arch/arm/mm/Kconfig | 24 |
1 files changed, 15 insertions, 9 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 27892e34b06..c4fc6be629d 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -410,17 +410,23 @@ config CPU_BPREDICT_DISABLE help Say Y here to disable branch prediction. If unsure, say N. +config TLS_REG_EMUL + bool + default y if (SMP || CPU_32v6) && (CPU_32v5 || CPU_32v4 || CPU_32v3) + help + We might be running on an ARMv6+ processor which should have the TLS + register but for some reason we can't use it, or maybe an SMP system + using a pre-ARMv6 processor (there are apparently a few prototypes + like that in existence) and therefore access to that register must + be emulated. + config HAS_TLS_REG bool - depends on CPU_32v6 && !CPU_32v5 && !CPU_32v4 && !CPU_32v3 - default y + depends on CPU_32v6 + default y if !TLS_REG_EMUL help This selects support for the CP15 thread register. - It is defined to be available on ARMv6 or later. However - if the kernel is configured to support multiple CPUs including - a pre-ARMv6 processors, or if a given ARMv6 processor doesn't - implement the thread register for some reason, then access to - this register from user space must be trapped and emulated. - If user space is relying on the __kuser_get_tls code then - there should not be any impact. + It is defined to be available on ARMv6 or later. If a particular + ARMv6 or later CPU doesn't support it then it must omc;ide "select + TLS_REG_EMUL" along with its other caracteristics. |