diff options
author | Paul Walmsley <paul@pwsan.com> | 2009-01-28 12:27:39 -0700 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-02-08 17:50:39 +0000 |
commit | 87246b7567f7d1951bfcea29875523ef435c0ebf (patch) | |
tree | ef95c7ee66f97630f5afa59ebf7054c371743767 /arch/arm/plat-omap/include/mach/sdrc.h | |
parent | f2ab99778a1a04ddbae38f4de4ef40f2edb92080 (diff) |
[ARM] OMAP2 SDRC: add SDRAM timing parameter infrastructure
For a given SDRAM clock rate, SDRAM chips require memory controllers
to use a specific set of timing minimums and maximums to transfer data
reliably. These parameters can be different for different memory chips
and can also potentially vary by board.
This patch adds the infrastructure for board-*.c files to pass this
timing data to the SDRAM controller init function. The timing data is
specified in an 'omap_sdrc_params' structure, in terms of SDRC
controller register values. An array of these structs, one per SDRC
target clock rate, is passed by the board-*.c file to
omap2_init_common_hw().
This patch does not define the values for different memory chips, nor
does it use the values for anything; those will come in subsequent patches.
linux-omap source commit is bc84ecfc795c2d1c5cda8da4127cf972f488a696.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/plat-omap/include/mach/sdrc.h')
-rw-r--r-- | arch/arm/plat-omap/include/mach/sdrc.h | 24 |
1 files changed, 23 insertions, 1 deletions
diff --git a/arch/arm/plat-omap/include/mach/sdrc.h b/arch/arm/plat-omap/include/mach/sdrc.h index 8e0740eb83f..adc73522491 100644 --- a/arch/arm/plat-omap/include/mach/sdrc.h +++ b/arch/arm/plat-omap/include/mach/sdrc.h @@ -81,7 +81,29 @@ #ifndef __ASSEMBLER__ -void __init omap2_sdrc_init(void); +/** + * struct omap_sdrc_params - SDRC parameters for a given SDRC clock rate + * @rate: SDRC clock rate (in Hz) + * @actim_ctrla: Value to program to SDRC_ACTIM_CTRLA for this rate + * @actim_ctrlb: Value to program to SDRC_ACTIM_CTRLB for this rate + * @rfr_ctrl: Value to program to SDRC_RFR_CTRL for this rate + * @mr: Value to program to SDRC_MR for this rate + * + * This structure holds a pre-computed set of register values for the + * SDRC for a given SDRC clock rate and SDRAM chip. These are + * intended to be pre-computed and specified in an array in the board-*.c + * files. The structure is keyed off the 'rate' field. + */ +struct omap_sdrc_params { + unsigned long rate; + u32 actim_ctrla; + u32 actim_ctrlb; + u32 rfr_ctrl; + u32 mr; +}; + +void __init omap2_sdrc_init(struct omap_sdrc_params *sp); +struct omap_sdrc_params *omap2_sdrc_get_params(unsigned long r); #ifdef CONFIG_ARCH_OMAP2 |