diff options
author | Tony Lindgren <Lopez> | 2009-01-15 13:09:54 +0200 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2009-01-15 13:09:54 +0200 |
commit | 3127f8f8595a064b3f1a1837fea2177902589ac3 (patch) | |
tree | 962f69089c03a947d9add0d9a2a92f923ff28014 /arch/arm/plat-omap/mcbsp.c | |
parent | 9b4a357787c27289b8c9efe916417690473538f7 (diff) |
ARM: OMAP: Fix ASoC by enabling writes to XCCR and RCCR McBSP registers, v3
This patch enables writing to McBSP Transmit Configuration Control
Register (XCCR) and Receive Configuration Control Register (RCCR)
for 2430/34xx platforms. It also adds XCCR, RCCR entries in McBSP
register configuration structure and bit definitions for both
registers.
If we enable the writing to CCR registers for 2430/34xx and don't
set the default values (setting 0 as a consequence) in ASoC driver,
the Transmit/Receive DMA mode gets disabled and the the
transmission/reception doesn't happen, ending with a
"write error: Input/Output error" when playing with 'aplay'.
Also define dummy CCR registers for omap1.
Cc: Jarkko Nikula <jarkko.nikula@nokia.com>
Signed-off-by: Misael Lopez Cruz <x0052729@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/plat-omap/mcbsp.c')
-rw-r--r-- | arch/arm/plat-omap/mcbsp.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index af33fc713e1..f2401a831f9 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -173,6 +173,10 @@ void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config) OMAP_MCBSP_WRITE(io_base, MCR2, config->mcr2); OMAP_MCBSP_WRITE(io_base, MCR1, config->mcr1); OMAP_MCBSP_WRITE(io_base, PCR0, config->pcr0); + if (cpu_is_omap2430() || cpu_is_omap34xx()) { + OMAP_MCBSP_WRITE(io_base, XCCR, config->xccr); + OMAP_MCBSP_WRITE(io_base, RCCR, config->rccr); + } } EXPORT_SYMBOL(omap_mcbsp_config); |