diff options
author | Tony Lindgren <tony@atomide.com> | 2008-10-14 18:17:53 +0100 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-10-14 19:32:45 +0100 |
commit | a468b6484fcd13a24addeb1212538776171b49a6 (patch) | |
tree | 5e778e69f3444fa5e92f96383a37adeb5542ac32 /arch/arm/plat-omap | |
parent | 59aaade72544ad1be4183c1066c20b5883a78717 (diff) |
[ARM] 5301/1: ARM: OMAP: Add missing irq defines
Some McBSP irq defines were missing that should have been added
with the earlier McBSP patches.
Add the missing McBSP irqs, and a few other missing irqs as
defined in linux-omap tree. Also add a blank line to separate
irq defines from the irq line calculations.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/plat-omap')
-rw-r--r-- | arch/arm/plat-omap/include/mach/irqs.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/include/mach/irqs.h b/arch/arm/plat-omap/include/mach/irqs.h index 9ee04969d36..ed1c1253b66 100644 --- a/arch/arm/plat-omap/include/mach/irqs.h +++ b/arch/arm/plat-omap/include/mach/irqs.h @@ -266,6 +266,8 @@ #define INT_24XX_GPTIMER11 47 #define INT_24XX_GPTIMER12 48 #define INT_24XX_SHA1MD5 51 +#define INT_24XX_MCBSP4_IRQ_TX 54 +#define INT_24XX_MCBSP4_IRQ_RX 55 #define INT_24XX_I2C1_IRQ 56 #define INT_24XX_I2C2_IRQ 57 #define INT_24XX_HDQ_IRQ 58 @@ -284,7 +286,22 @@ #define INT_24XX_USB_IRQ_HGEN 78 #define INT_24XX_USB_IRQ_HSOF 79 #define INT_24XX_USB_IRQ_OTG 80 +#define INT_24XX_MCBSP5_IRQ_TX 81 +#define INT_24XX_MCBSP5_IRQ_RX 82 #define INT_24XX_MMC_IRQ 83 +#define INT_24XX_MMC2_IRQ 86 +#define INT_24XX_MCBSP3_IRQ_TX 89 +#define INT_24XX_MCBSP3_IRQ_RX 90 +#define INT_24XX_SPI3_IRQ 91 + +#define INT_243X_MCBSP2_IRQ 16 +#define INT_243X_MCBSP3_IRQ 17 +#define INT_243X_MCBSP4_IRQ 18 +#define INT_243X_MCBSP5_IRQ 19 +#define INT_243X_MCBSP1_IRQ 64 +#define INT_243X_HS_USB_MC 92 +#define INT_243X_HS_USB_DMA 93 +#define INT_243X_CARKIT_IRQ 94 #define INT_34XX_BENCH_MPU_EMUL 3 #define INT_34XX_ST_MCBSP2_IRQ 4 @@ -321,6 +338,7 @@ #define INT_34XX_PARTHASH_IRQ 79 #define INT_34XX_MMC3_IRQ 94 #define INT_34XX_GPT12_IRQ 95 + /* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730) and * 16 MPUIO lines */ #define OMAP_MAX_GPIO_LINES 192 |