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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2009-03-25 18:31:35 +0000
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-03-25 18:31:35 +0000
commit8937b7349ca9e25a02b2a72ccb7fba404ddedc5b (patch)
tree434ffe23d318f8af55850a26c3431ce8b82ab6f4 /arch/arm/plat-omap
parent997302259f386bca8fe1db67c50296ca426c438f (diff)
parentffe7f95bb1a4d1e9ca5d252445dc38476e1a208e (diff)
Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 into devel
Diffstat (limited to 'arch/arm/plat-omap')
-rw-r--r--arch/arm/plat-omap/Kconfig8
-rw-r--r--arch/arm/plat-omap/devices.c3
-rw-r--r--arch/arm/plat-omap/dma.c28
-rw-r--r--arch/arm/plat-omap/dmtimer.c26
-rw-r--r--arch/arm/plat-omap/gpio.c111
-rw-r--r--arch/arm/plat-omap/i2c.c104
-rw-r--r--arch/arm/plat-omap/include/mach/board-2430sdp.h41
-rw-r--r--arch/arm/plat-omap/include/mach/board-apollon.h46
-rw-r--r--arch/arm/plat-omap/include/mach/board-fsample.h51
-rw-r--r--arch/arm/plat-omap/include/mach/board-h2.h41
-rw-r--r--arch/arm/plat-omap/include/mach/board-h3.h38
-rw-r--r--arch/arm/plat-omap/include/mach/board-h4.h38
-rw-r--r--arch/arm/plat-omap/include/mach/board-innovator.h52
-rw-r--r--arch/arm/plat-omap/include/mach/board-ldp.h39
-rw-r--r--arch/arm/plat-omap/include/mach/board-nokia.h54
-rw-r--r--arch/arm/plat-omap/include/mach/board-omap3beagle.h33
-rw-r--r--arch/arm/plat-omap/include/mach/board-osk.h47
-rw-r--r--arch/arm/plat-omap/include/mach/board-overo.h26
-rw-r--r--arch/arm/plat-omap/include/mach/board-palmte.h32
-rw-r--r--arch/arm/plat-omap/include/mach/board-palmtt.h23
-rw-r--r--arch/arm/plat-omap/include/mach/board-palmz71.h26
-rw-r--r--arch/arm/plat-omap/include/mach/board-perseus2.h39
-rw-r--r--arch/arm/plat-omap/include/mach/board-voiceblue.h1
-rw-r--r--arch/arm/plat-omap/include/mach/board.h4
-rw-r--r--arch/arm/plat-omap/include/mach/cpu.h35
-rw-r--r--arch/arm/plat-omap/include/mach/gpio.h3
-rw-r--r--arch/arm/plat-omap/include/mach/hardware.h74
-rw-r--r--arch/arm/plat-omap/include/mach/irqs.h83
-rw-r--r--arch/arm/plat-omap/include/mach/mailbox.h27
-rw-r--r--arch/arm/plat-omap/include/mach/mmc.h2
-rw-r--r--arch/arm/plat-omap/include/mach/mux.h65
-rw-r--r--arch/arm/plat-omap/include/mach/omap34xx.h28
-rw-r--r--arch/arm/plat-omap/include/mach/omap850.h102
-rw-r--r--arch/arm/plat-omap/include/mach/system.h2
-rw-r--r--arch/arm/plat-omap/include/mach/usb.h10
-rw-r--r--arch/arm/plat-omap/mailbox.c152
-rw-r--r--arch/arm/plat-omap/mailbox.h100
-rw-r--r--arch/arm/plat-omap/sram.c2
-rw-r--r--arch/arm/plat-omap/usb.c25
39 files changed, 722 insertions, 899 deletions
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index e25e1ac64fc..9dd68fafb37 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -107,6 +107,14 @@ config OMAP_MCBSP
Say Y here if you want support for the OMAP Multichannel
Buffered Serial Port.
+config OMAP_MBOX_FWK
+ tristate "Mailbox framework support"
+ depends on ARCH_OMAP
+ default n
+ help
+ Say Y here if you want to use OMAP Mailbox framework support for
+ DSP, IVA1.0 and IVA2 in OMAP1/2/3.
+
choice
prompt "System timer"
default OMAP_MPU_TIMER
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index 208dbb121f4..87fb7ff4179 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -228,6 +228,9 @@ int __init omap_mmc_add(const char *name, int id, unsigned long base,
ret = platform_device_add(pdev);
if (ret)
goto fail;
+
+ /* return device handle to board setup code */
+ data->dev = &pdev->dev;
return 0;
fail:
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 47ec77af4cc..21cc0142b97 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -123,6 +123,7 @@ static struct dma_link_info *dma_linked_lch;
static int dma_lch_count;
static int dma_chan_count;
+static int omap_dma_reserve_channels;
static spinlock_t dma_chan_lock;
static struct omap_dma_lch *dma_chan;
@@ -737,7 +738,7 @@ int omap_request_dma(int dev_id, const char *dev_name,
* id.
*/
dma_write(dev_id | (1 << 10), CCR(free_ch));
- } else if (cpu_is_omap730() || cpu_is_omap15xx()) {
+ } else if (cpu_is_omap7xx() || cpu_is_omap15xx()) {
dma_write(dev_id, CCR(free_ch));
}
@@ -1900,7 +1901,7 @@ static int omap2_dma_handle_ch(int ch)
/* STATUS register count is from 1-32 while our is 0-31 */
static irqreturn_t omap2_dma_irq_handler(int irq, void *dev_id)
{
- u32 val;
+ u32 val, enable_reg;
int i;
val = dma_read(IRQSTATUS_L0);
@@ -1909,6 +1910,8 @@ static irqreturn_t omap2_dma_irq_handler(int irq, void *dev_id)
printk(KERN_WARNING "Spurious DMA IRQ\n");
return IRQ_HANDLED;
}
+ enable_reg = dma_read(IRQENABLE_L0);
+ val &= enable_reg; /* Dispatch only relevant interrupts */
for (i = 0; i < dma_lch_count && val != 0; i++) {
if (val & 1)
omap2_dma_handle_ch(i);
@@ -2321,6 +2324,10 @@ static int __init omap_init_dma(void)
return -ENODEV;
}
+ if (cpu_class_is_omap2() && omap_dma_reserve_channels
+ && (omap_dma_reserve_channels <= dma_lch_count))
+ dma_lch_count = omap_dma_reserve_channels;
+
dma_chan = kzalloc(sizeof(struct omap_dma_lch) * dma_lch_count,
GFP_KERNEL);
if (!dma_chan)
@@ -2339,7 +2346,7 @@ static int __init omap_init_dma(void)
printk(KERN_INFO "DMA support for OMAP15xx initialized\n");
dma_chan_count = 9;
enable_1510_mode = 1;
- } else if (cpu_is_omap16xx() || cpu_is_omap730()) {
+ } else if (cpu_is_omap16xx() || cpu_is_omap7xx()) {
printk(KERN_INFO "OMAP DMA hardware version %d\n",
dma_read(HW_ID));
printk(KERN_INFO "DMA capabilities: %08x:%08x:%04x:%04x:%04x\n",
@@ -2371,7 +2378,7 @@ static int __init omap_init_dma(void)
u8 revision = dma_read(REVISION) & 0xff;
printk(KERN_INFO "OMAP DMA hardware revision %d.%d\n",
revision >> 4, revision & 0xf);
- dma_chan_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
+ dma_chan_count = dma_lch_count;
} else {
dma_chan_count = 0;
return 0;
@@ -2437,4 +2444,17 @@ static int __init omap_init_dma(void)
arch_initcall(omap_init_dma);
+/*
+ * Reserve the omap SDMA channels using cmdline bootarg
+ * "omap_dma_reserve_ch=". The valid range is 1 to 32
+ */
+static int __init omap_dma_cmdline_reserve_ch(char *str)
+{
+ if (get_option(&str, &omap_dma_reserve_channels) != 1)
+ omap_dma_reserve_channels = 0;
+ return 1;
+}
+
+__setup("omap_dma_reserve_ch=", omap_dma_cmdline_reserve_ch);
+
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index e4f0ce04ba9..bfd47570cc9 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -33,6 +33,7 @@
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/io.h>
+#include <linux/module.h>
#include <mach/hardware.h>
#include <mach/dmtimer.h>
#include <mach/irqs.h>
@@ -362,6 +363,7 @@ struct omap_dm_timer *omap_dm_timer_request(void)
return timer;
}
+EXPORT_SYMBOL_GPL(omap_dm_timer_request);
struct omap_dm_timer *omap_dm_timer_request_specific(int id)
{
@@ -385,6 +387,7 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id)
return timer;
}
+EXPORT_SYMBOL_GPL(omap_dm_timer_request_specific);
void omap_dm_timer_free(struct omap_dm_timer *timer)
{
@@ -395,6 +398,7 @@ void omap_dm_timer_free(struct omap_dm_timer *timer)
WARN_ON(!timer->reserved);
timer->reserved = 0;
}
+EXPORT_SYMBOL_GPL(omap_dm_timer_free);
void omap_dm_timer_enable(struct omap_dm_timer *timer)
{
@@ -406,6 +410,7 @@ void omap_dm_timer_enable(struct omap_dm_timer *timer)
timer->enabled = 1;
}
+EXPORT_SYMBOL_GPL(omap_dm_timer_enable);
void omap_dm_timer_disable(struct omap_dm_timer *timer)
{
@@ -417,11 +422,13 @@ void omap_dm_timer_disable(struct omap_dm_timer *timer)
timer->enabled = 0;
}
+EXPORT_SYMBOL_GPL(omap_dm_timer_disable);
int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
{
return timer->irq;
}
+EXPORT_SYMBOL_GPL(omap_dm_timer_get_irq);
#if defined(CONFIG_ARCH_OMAP1)
@@ -452,6 +459,7 @@ __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
return inputmask;
}
+EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
#elif defined(CONFIG_ARCH_OMAP2) || defined (CONFIG_ARCH_OMAP3)
@@ -459,6 +467,7 @@ struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
{
return timer->fclk;
}
+EXPORT_SYMBOL_GPL(omap_dm_timer_get_fclk);
__u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
{
@@ -466,6 +475,7 @@ __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
return 0;
}
+EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
#endif
@@ -473,6 +483,7 @@ void omap_dm_timer_trigger(struct omap_dm_timer *timer)
{
omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
}
+EXPORT_SYMBOL_GPL(omap_dm_timer_trigger);
void omap_dm_timer_start(struct omap_dm_timer *timer)
{
@@ -484,6 +495,7 @@ void omap_dm_timer_start(struct omap_dm_timer *timer)
omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
}
}
+EXPORT_SYMBOL_GPL(omap_dm_timer_start);
void omap_dm_timer_stop(struct omap_dm_timer *timer)
{
@@ -495,6 +507,7 @@ void omap_dm_timer_stop(struct omap_dm_timer *timer)
omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
}
}
+EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
#ifdef CONFIG_ARCH_OMAP1
@@ -507,6 +520,7 @@ void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
l |= source << n;
omap_writel(l, MOD_CONF_CTRL_1);
}
+EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
#else
@@ -523,6 +537,7 @@ void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
* cause an abort. */
__delay(150000);
}
+EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
#endif
@@ -541,6 +556,7 @@ void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
}
+EXPORT_SYMBOL_GPL(omap_dm_timer_set_load);
/* Optimized set_load which removes costly spin wait in timer_start */
void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
@@ -560,6 +576,7 @@ void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, load);
omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
}
+EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start);
void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
unsigned int match)
@@ -574,6 +591,7 @@ void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, match);
}
+EXPORT_SYMBOL_GPL(omap_dm_timer_set_match);
void omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
int toggle, int trigger)
@@ -590,6 +608,7 @@ void omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
l |= trigger << 10;
omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
}
+EXPORT_SYMBOL_GPL(omap_dm_timer_set_pwm);
void omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler)
{
@@ -603,6 +622,7 @@ void omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler)
}
omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
}
+EXPORT_SYMBOL_GPL(omap_dm_timer_set_prescaler);
void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
unsigned int value)
@@ -610,6 +630,7 @@ void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
omap_dm_timer_write_reg(timer, OMAP_TIMER_INT_EN_REG, value);
omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG, value);
}
+EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable);
unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
{
@@ -619,11 +640,13 @@ unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
return l;
}
+EXPORT_SYMBOL_GPL(omap_dm_timer_read_status);
void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
{
omap_dm_timer_write_reg(timer, OMAP_TIMER_STAT_REG, value);
}
+EXPORT_SYMBOL_GPL(omap_dm_timer_write_status);
unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
{
@@ -633,11 +656,13 @@ unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
return l;
}
+EXPORT_SYMBOL_GPL(omap_dm_timer_read_counter);
void omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value)
{
omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, value);
}
+EXPORT_SYMBOL_GPL(omap_dm_timer_write_counter);
int omap_dm_timers_active(void)
{
@@ -658,6 +683,7 @@ int omap_dm_timers_active(void)
}
return 0;
}
+EXPORT_SYMBOL_GPL(omap_dm_timers_active);
int __init omap_dm_timer_init(void)
{
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index f856a90b264..d3fa41e3d8c 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -81,6 +81,22 @@
#define OMAP730_GPIO_INT_STATUS 0x14
/*
+ * OMAP850 specific GPIO registers
+ */
+#define OMAP850_GPIO1_BASE IO_ADDRESS(0xfffbc000)
+#define OMAP850_GPIO2_BASE IO_ADDRESS(0xfffbc800)
+#define OMAP850_GPIO3_BASE IO_ADDRESS(0xfffbd000)
+#define OMAP850_GPIO4_BASE IO_ADDRESS(0xfffbd800)
+#define OMAP850_GPIO5_BASE IO_ADDRESS(0xfffbe000)
+#define OMAP850_GPIO6_BASE IO_ADDRESS(0xfffbe800)
+#define OMAP850_GPIO_DATA_INPUT 0x00
+#define OMAP850_GPIO_DATA_OUTPUT 0x04
+#define OMAP850_GPIO_DIR_CONTROL 0x08
+#define OMAP850_GPIO_INT_CONTROL 0x0c
+#define OMAP850_GPIO_INT_MASK 0x10
+#define OMAP850_GPIO_INT_STATUS 0x14
+
+/*
* omap24xx specific GPIO registers
*/
#define OMAP242X_GPIO1_BASE IO_ADDRESS(0x48018000)
@@ -159,7 +175,8 @@ struct gpio_bank {
#define METHOD_GPIO_1510 1
#define METHOD_GPIO_1610 2
#define METHOD_GPIO_730 3
-#define METHOD_GPIO_24XX 4
+#define METHOD_GPIO_850 4
+#define METHOD_GPIO_24XX 5
#ifdef CONFIG_ARCH_OMAP16XX
static struct gpio_bank gpio_bank_1610[5] = {
@@ -190,6 +207,19 @@ static struct gpio_bank gpio_bank_730[7] = {
};
#endif
+#ifdef CONFIG_ARCH_OMAP850
+static struct gpio_bank gpio_bank_850[7] = {
+ { OMAP_MPUIO_BASE, INT_850_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO },
+ { OMAP850_GPIO1_BASE, INT_850_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_850 },
+ { OMAP850_GPIO2_BASE, INT_850_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_850 },
+ { OMAP850_GPIO3_BASE, INT_850_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_850 },
+ { OMAP850_GPIO4_BASE, INT_850_GPIO_BANK4, IH_GPIO_BASE + 96, METHOD_GPIO_850 },
+ { OMAP850_GPIO5_BASE, INT_850_GPIO_BANK5, IH_GPIO_BASE + 128, METHOD_GPIO_850 },
+ { OMAP850_GPIO6_BASE, INT_850_GPIO_BANK6, IH_GPIO_BASE + 160, METHOD_GPIO_850 },
+};
+#endif
+
+
#ifdef CONFIG_ARCH_OMAP24XX
static struct gpio_bank gpio_bank_242x[4] = {
@@ -236,7 +266,7 @@ static inline struct gpio_bank *get_gpio_bank(int gpio)
return &gpio_bank[0];
return &gpio_bank[1 + (gpio >> 4)];
}
- if (cpu_is_omap730()) {
+ if (cpu_is_omap7xx()) {
if (OMAP_GPIO_IS_MPUIO(gpio))
return &gpio_bank[0];
return &gpio_bank[1 + (gpio >> 5)];
@@ -251,7 +281,7 @@ static inline struct gpio_bank *get_gpio_bank(int gpio)
static inline int get_gpio_index(int gpio)
{
- if (cpu_is_omap730())
+ if (cpu_is_omap7xx())
return gpio & 0x1f;
if (cpu_is_omap24xx())
return gpio & 0x1f;
@@ -273,7 +303,7 @@ static inline int gpio_valid(int gpio)
return 0;
if ((cpu_is_omap16xx()) && gpio < 64)
return 0;
- if (cpu_is_omap730() && gpio < 192)
+ if (cpu_is_omap7xx() && gpio < 192)
return 0;
if (cpu_is_omap24xx() && gpio < 128)
return 0;
@@ -318,6 +348,11 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
reg += OMAP730_GPIO_DIR_CONTROL;
break;
#endif
+#ifdef CONFIG_ARCH_OMAP850
+ case METHOD_GPIO_850:
+ reg += OMAP850_GPIO_DIR_CONTROL;
+ break;
+#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
case METHOD_GPIO_24XX:
reg += OMAP24XX_GPIO_OE;
@@ -380,6 +415,16 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
l &= ~(1 << gpio);
break;
#endif
+#ifdef CONFIG_ARCH_OMAP850
+ case METHOD_GPIO_850:
+ reg += OMAP850_GPIO_DATA_OUTPUT;
+ l = __raw_readl(reg);
+ if (enable)
+ l |= 1 << gpio;
+ else
+ l &= ~(1 << gpio);
+ break;
+#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
case METHOD_GPIO_24XX:
if (enable)
@@ -426,6 +471,11 @@ static int __omap_get_gpio_datain(int gpio)
reg += OMAP730_GPIO_DATA_INPUT;
break;
#endif
+#ifdef CONFIG_ARCH_OMAP850
+ case METHOD_GPIO_850:
+ reg += OMAP850_GPIO_DATA_INPUT;
+ break;
+#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
case METHOD_GPIO_24XX:
reg += OMAP24XX_GPIO_DATAIN;
@@ -598,6 +648,18 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
goto bad;
break;
#endif
+#ifdef CONFIG_ARCH_OMAP850
+ case METHOD_GPIO_850:
+ reg += OMAP850_GPIO_INT_CONTROL;
+ l = __raw_readl(reg);
+ if (trigger & IRQ_TYPE_EDGE_RISING)
+ l |= 1 << gpio;
+ else if (trigger & IRQ_TYPE_EDGE_FALLING)
+ l &= ~(1 << gpio);
+ else
+ goto bad;
+ break;
+#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
case METHOD_GPIO_24XX:
set_24xx_gpio_triggering(bank, gpio, trigger);
@@ -678,6 +740,11 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
reg += OMAP730_GPIO_INT_STATUS;
break;
#endif
+#ifdef CONFIG_ARCH_OMAP850
+ case METHOD_GPIO_850:
+ reg += OMAP850_GPIO_INT_STATUS;
+ break;
+#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
case METHOD_GPIO_24XX:
reg += OMAP24XX_GPIO_IRQSTATUS1;
@@ -736,6 +803,13 @@ static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
inv = 1;
break;
#endif
+#ifdef CONFIG_ARCH_OMAP850
+ case METHOD_GPIO_850:
+ reg += OMAP850_GPIO_INT_MASK;
+ mask = 0xffffffff;
+ inv = 1;
+ break;
+#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
case METHOD_GPIO_24XX:
reg += OMAP24XX_GPIO_IRQENABLE1;
@@ -799,6 +873,16 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab
l |= gpio_mask;
break;
#endif
+#ifdef CONFIG_ARCH_OMAP850
+ case METHOD_GPIO_850:
+ reg += OMAP850_GPIO_INT_MASK;
+ l = __raw_readl(reg);
+ if (enable)
+ l &= ~(gpio_mask);
+ else
+ l |= gpio_mask;
+ break;
+#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
case METHOD_GPIO_24XX:
if (enable)
@@ -983,6 +1067,10 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
if (bank->method == METHOD_GPIO_730)
isr_reg = bank->base + OMAP730_GPIO_INT_STATUS;
#endif
+#ifdef CONFIG_ARCH_OMAP850
+ if (bank->method == METHOD_GPIO_850)
+ isr_reg = bank->base + OMAP850_GPIO_INT_STATUS;
+#endif
#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
if (bank->method == METHOD_GPIO_24XX)
isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1;
@@ -1372,6 +1460,13 @@ static int __init _omap_gpio_init(void)
gpio_bank = gpio_bank_730;
}
#endif
+#ifdef CONFIG_ARCH_OMAP850
+ if (cpu_is_omap850()) {
+ printk(KERN_INFO "OMAP850 GPIO hardware\n");
+ gpio_bank_count = 7;
+ gpio_bank = gpio_bank_850;
+ }
+#endif
#ifdef CONFIG_ARCH_OMAP24XX
if (cpu_is_omap242x()) {
@@ -1420,7 +1515,7 @@ static int __init _omap_gpio_init(void)
__raw_writew(0xffff, bank->base + OMAP1610_GPIO_IRQSTATUS1);
__raw_writew(0x0014, bank->base + OMAP1610_GPIO_SYSCONFIG);
}
- if (cpu_is_omap730() && bank->method == METHOD_GPIO_730) {
+ if (cpu_is_omap7xx() && bank->method == METHOD_GPIO_730) {
__raw_writel(0xffffffff, bank->base + OMAP730_GPIO_INT_MASK);
__raw_writel(0x00000000, bank->base + OMAP730_GPIO_INT_STATUS);
@@ -1743,6 +1838,9 @@ static int gpio_is_input(struct gpio_bank *bank, int mask)
case METHOD_GPIO_730:
reg += OMAP730_GPIO_DIR_CONTROL;
break;
+ case METHOD_GPIO_850:
+ reg += OMAP850_GPIO_DIR_CONTROL;
+ break;
case METHOD_GPIO_24XX:
reg += OMAP24XX_GPIO_OE;
break;
@@ -1762,7 +1860,8 @@ static int dbg_gpio_show(struct seq_file *s, void *unused)
if (bank_is_mpuio(bank))
gpio = OMAP_MPUIO(0);
- else if (cpu_class_is_omap2() || cpu_is_omap730())
+ else if (cpu_class_is_omap2() || cpu_is_omap730() ||
+ cpu_is_omap850())
bankwidth = 32;
for (j = 0; j < bankwidth; j++, gpio++, mask <<= 1) {
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index 467531edefd..a303071d5e3 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -98,6 +98,8 @@ static const int omap34xx_pins[][2] = {
static const int omap34xx_pins[][2] = {};
#endif
+#define OMAP_I2C_CMDLINE_SETUP (BIT(31))
+
static void __init omap_i2c_mux_pins(int bus)
{
int scl, sda;
@@ -119,14 +121,9 @@ static void __init omap_i2c_mux_pins(int bus)
omap_cfg_reg(scl);
}
-int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
- struct i2c_board_info const *info,
- unsigned len)
+static int __init omap_i2c_nr_ports(void)
{
- int ports, err;
- struct platform_device *pdev;
- struct resource *res;
- resource_size_t base, irq;
+ int ports = 0;
if (cpu_class_is_omap1())
ports = 1;
@@ -135,17 +132,16 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
else if (cpu_is_omap34xx())
ports = 3;
- BUG_ON(bus_id < 1 || bus_id > ports);
+ return ports;
+}
- if (info) {
- err = i2c_register_board_info(bus_id, info, len);
- if (err)
- return err;
- }
+static int __init omap_i2c_add_bus(int bus_id)
+{
+ struct platform_device *pdev;
+ struct resource *res;
+ resource_size_t base, irq;
pdev = &omap_i2c_devices[bus_id - 1];
- *(u32 *)pdev->dev.platform_data = clkrate;
-
if (bus_id == 1) {
res = pdev->resource;
if (cpu_class_is_omap1()) {
@@ -163,3 +159,81 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
omap_i2c_mux_pins(bus_id - 1);
return platform_device_register(pdev);
}
+
+/**
+ * omap_i2c_bus_setup - Process command line options for the I2C bus speed
+ * @str: String of options
+ *
+ * This function allow to override the default I2C bus speed for given I2C
+ * bus with a command line option.
+ *
+ * Format: i2c_bus=bus_id,clkrate (in kHz)
+ *
+ * Returns 1 on success, 0 otherwise.
+ */
+static int __init omap_i2c_bus_setup(char *str)
+{
+ int ports;
+ int ints[3];
+
+ ports = omap_i2c_nr_ports();
+ get_options(str, 3, ints);
+ if (ints[0] < 2 || ints[1] < 1 || ints[1] > ports)
+ return 0;
+ i2c_rate[ints[1] - 1] = ints[2];
+ i2c_rate[ints[1] - 1] |= OMAP_I2C_CMDLINE_SETUP;
+
+ return 1;
+}
+__setup("i2c_bus=", omap_i2c_bus_setup);
+
+/*
+ * Register busses defined in command line but that are not registered with
+ * omap_register_i2c_bus from board initialization code.
+ */
+static int __init omap_register_i2c_bus_cmdline(void)
+{
+ int i, err = 0;
+
+ for (i = 0; i < ARRAY_SIZE(i2c_rate); i++)
+ if (i2c_rate[i] & OMAP_I2C_CMDLINE_SETUP) {
+ i2c_rate[i] &= ~OMAP_I2C_CMDLINE_SETUP;
+ err = omap_i2c_add_bus(i + 1);
+ if (err)
+ goto out;
+ }
+
+out:
+ return err;
+}
+subsys_initcall(omap_register_i2c_bus_cmdline);
+
+/**
+ * omap_register_i2c_bus - register I2C bus with device descriptors
+ * @bus_id: bus id counting from number 1
+ * @clkrate: clock rate of the bus in kHz
+ * @info: pointer into I2C device descriptor table or NULL
+ * @len: number of descriptors in the table
+ *
+ * Returns 0 on success or an error code.
+ */
+int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
+ struct i2c_board_info const *info,
+ unsigned len)
+{
+ int err;
+
+ BUG_ON(bus_id < 1 || bus_id > omap_i2c_nr_ports());
+
+ if (info) {
+ err = i2c_register_board_info(bus_id, info, len);
+ if (err)
+ return err;
+ }
+
+ if (!i2c_rate[bus_id - 1])
+ i2c_rate[bus_id - 1] = clkrate;
+ i2c_rate[bus_id - 1] &= ~OMAP_I2C_CMDLINE_SETUP;
+
+ return omap_i2c_add_bus(bus_id);
+}
diff --git a/arch/arm/plat-omap/include/mach/board-2430sdp.h b/arch/arm/plat-omap/include/mach/board-2430sdp.h
deleted file mode 100644
index 10d449ea7ed..00000000000
--- a/arch/arm/plat-omap/include/mach/board-2430sdp.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * arch/arm/plat-omap/include/mach/board-2430sdp.h
- *
- * Hardware definitions for TI OMAP2430 SDP board.
- *
- * Based on board-h4.h by Dirk Behme <dirk.behme@de.bosch.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef __ASM_ARCH_OMAP_2430SDP_H
-#define __ASM_ARCH_OMAP_2430SDP_H
-
-/* Placeholder for 2430SDP specific defines */
-#define OMAP24XX_ETHR_START 0x08000300
-#define OMAP24XX_ETHR_GPIO_IRQ 149
-#define SDP2430_CS0_BASE 0x04000000
-
-/* Function prototypes */
-extern void sdp2430_flash_init(void);
-extern void sdp2430_usb_init(void);
-
-#endif /* __ASM_ARCH_OMAP_2430SDP_H */
diff --git a/arch/arm/plat-omap/include/mach/board-apollon.h b/arch/arm/plat-omap/include/mach/board-apollon.h
deleted file mode 100644
index 61bd5e8f09b..00000000000
--- a/arch/arm/plat-omap/include/mach/board-apollon.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * arch/arm/plat-omap/include/mach/board-apollon.h
- *
- * Hardware definitions for Samsung OMAP24XX Apollon board.
- *
- * Initial creation by Kyungmin Park <kyungmin.park@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef __ASM_ARCH_OMAP_APOLLON_H
-#define __ASM_ARCH_OMAP_APOLLON_H
-
-#include <mach/cpu.h>
-
-extern void apollon_mmc_init(void);
-
-static inline int apollon_plus(void)
-{
- /* The apollon plus has IDCODE revision 5 */
- return omap_rev() & 0xc0;
-}
-
-/* Placeholder for APOLLON specific defines */
-#define APOLLON_ETHR_GPIO_IRQ 74
-
-#endif /* __ASM_ARCH_OMAP_APOLLON_H */
-
diff --git a/arch/arm/plat-omap/include/mach/board-fsample.h b/arch/arm/plat-omap/include/mach/board-fsample.h
deleted file mode 100644
index cb3c5ae1277..00000000000
--- a/arch/arm/plat-omap/include/mach/board-fsample.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * arch/arm/plat-omap/include/mach/board-fsample.h
- *
- * Board-specific goodies for TI F-Sample.
- *
- * Copyright (C) 2006 Google, Inc.
- * Author: Brian Swetland <swetland@google.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARCH_OMAP_FSAMPLE_H
-#define __ASM_ARCH_OMAP_FSAMPLE_H
-
-/* fsample is pretty close to p2-sample */
-#include <mach/board-perseus2.h>
-
-#define fsample_cpld_read(reg) __raw_readb(reg)
-#define fsample_cpld_write(val, reg) __raw_writeb(val, reg)
-
-#define FSAMPLE_CPLD_BASE 0xE8100000
-#define FSAMPLE_CPLD_SIZE SZ_4K
-#define FSAMPLE_CPLD_START 0x05080000
-
-#define FSAMPLE_CPLD_REG_A (FSAMPLE_CPLD_BASE + 0x00)
-#define FSAMPLE_CPLD_SWITCH (FSAMPLE_CPLD_BASE + 0x02)
-#define FSAMPLE_CPLD_UART (FSAMPLE_CPLD_BASE + 0x02)
-#define FSAMPLE_CPLD_REG_B (FSAMPLE_CPLD_BASE + 0x04)
-#define FSAMPLE_CPLD_VERSION (FSAMPLE_CPLD_BASE + 0x06)
-#define FSAMPLE_CPLD_SET_CLR (FSAMPLE_CPLD_BASE + 0x06)
-
-#define FSAMPLE_CPLD_BIT_BT_RESET 0
-#define FSAMPLE_CPLD_BIT_LCD_RESET 1
-#define FSAMPLE_CPLD_BIT_CAM_PWDN 2
-#define FSAMPLE_CPLD_BIT_CHARGER_ENABLE 3
-#define FSAMPLE_CPLD_BIT_SD_MMC_EN 4
-#define FSAMPLE_CPLD_BIT_aGPS_PWREN 5
-#define FSAMPLE_CPLD_BIT_BACKLIGHT 6
-#define FSAMPLE_CPLD_BIT_aGPS_EN_RESET 7
-#define FSAMPLE_CPLD_BIT_aGPS_SLEEPx_N 8
-#define FSAMPLE_CPLD_BIT_OTG_RESET 9
-
-#define fsample_cpld_set(bit) \
- fsample_cpld_write((((bit) & 15) << 4) | 0x0f, FSAMPLE_CPLD_SET_CLR)
-
-#define fsample_cpld_clear(bit) \
- fsample_cpld_write(0xf0 | ((bit) & 15), FSAMPLE_CPLD_SET_CLR)
-
-#endif
diff --git a/arch/arm/plat-omap/include/mach/board-h2.h b/arch/arm/plat-omap/include/mach/board-h2.h
deleted file mode 100644
index 15531c8dc0e..00000000000
--- a/arch/arm/plat-omap/include/mach/board-h2.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * arch/arm/plat-omap/include/mach/board-h2.h
- *
- * Hardware definitions for TI OMAP1610 H2 board.
- *
- * Cleanup for Linux-2.6 by Dirk Behme <dirk.behme@de.bosch.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef __ASM_ARCH_OMAP_H2_H
-#define __ASM_ARCH_OMAP_H2_H
-
-/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
-#define OMAP1610_ETHR_START 0x04000300
-
-#define H2_TPS_GPIO_BASE (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */)
-# define H2_TPS_GPIO_MMC_PWR_EN (H2_TPS_GPIO_BASE + 3)
-
-extern void h2_mmc_init(void);
-
-#endif /* __ASM_ARCH_OMAP_H2_H */
-
diff --git a/arch/arm/plat-omap/include/mach/board-h3.h b/arch/arm/plat-omap/include/mach/board-h3.h
deleted file mode 100644
index 1888326da7e..00000000000
--- a/arch/arm/plat-omap/include/mach/board-h3.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * arch/arm/plat-omap/include/mach/board-h3.h
- *
- * Copyright (C) 2001 RidgeRun, Inc.
- * Copyright (C) 2004 Texas Instruments, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#ifndef __ASM_ARCH_OMAP_H3_H
-#define __ASM_ARCH_OMAP_H3_H
-
-/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
-#define OMAP1710_ETHR_START 0x04000300
-
-#define H3_TPS_GPIO_BASE (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */)
-# define H3_TPS_GPIO_MMC_PWR_EN (H3_TPS_GPIO_BASE + 4)
-
-extern void h3_mmc_init(void);
-
-#endif /* __ASM_ARCH_OMAP_H3_H */
diff --git a/arch/arm/plat-omap/include/mach/board-h4.h b/arch/arm/plat-omap/include/mach/board-h4.h
deleted file mode 100644
index 7c3fa0f0a65..00000000000
--- a/arch/arm/plat-omap/include/mach/board-h4.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * arch/arm/plat-omap/include/mach/board-h4.h
- *
- * Hardware definitions for TI OMAP2420 H4 board.
- *
- * Initial creation by Dirk Behme <dirk.behme@de.bosch.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef __ASM_ARCH_OMAP_H4_H
-#define __ASM_ARCH_OMAP_H4_H
-
-/* MMC Prototypes */
-extern void h4_mmc_init(void);
-
-/* Placeholder for H4 specific defines */
-#define OMAP24XX_ETHR_GPIO_IRQ 92
-#endif /* __ASM_ARCH_OMAP_H4_H */
-
diff --git a/arch/arm/plat-omap/include/mach/board-innovator.h b/arch/arm/plat-omap/include/mach/board-innovator.h
deleted file mode 100644
index 5ae3e79b9f9..00000000000
--- a/arch/arm/plat-omap/include/mach/board-innovator.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * arch/arm/plat-omap/include/mach/board-innovator.h
- *
- * Copyright (C) 2001 RidgeRun, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#ifndef __ASM_ARCH_OMAP_INNOVATOR_H
-#define __ASM_ARCH_OMAP_INNOVATOR_H
-
-#if defined (CONFIG_ARCH_OMAP15XX)
-
-#ifndef OMAP_SDRAM_DEVICE
-#define OMAP_SDRAM_DEVICE D256M_1X16_4B
-#endif
-
-#define OMAP1510P1_IMIF_PRI_VALUE 0x00
-#define OMAP1510P1_EMIFS_PRI_VALUE 0x00
-#define OMAP1510P1_EMIFF_PRI_VALUE 0x00
-
-#ifndef __ASSEMBLY__
-void fpga_write(unsigned char val, int reg);
-unsigned char fpga_read(int reg);
-#endif
-
-#endif /* CONFIG_ARCH_OMAP15XX */
-
-#if defined (CONFIG_ARCH_OMAP16XX)
-
-/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
-#define INNOVATOR1610_ETHR_START 0x04000300
-
-#endif /* CONFIG_ARCH_OMAP1610 */
-#endif /* __ASM_ARCH_OMAP_INNOVATOR_H */
diff --git a/arch/arm/plat-omap/include/mach/board-ldp.h b/arch/arm/plat-omap/include/mach/board-ldp.h
deleted file mode 100644
index f2339966521..00000000000
--- a/arch/arm/plat-omap/include/mach/board-ldp.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * arch/arm/plat-omap/include/mach/board-ldp.h
- *
- * Hardware definitions for TI OMAP3 LDP.
- *
- * Copyright (C) 2008 Texas Instruments Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef __ASM_ARCH_OMAP_LDP_H
-#define __ASM_ARCH_OMAP_LDP_H
-
-extern void twl4030_bci_battery_init(void);
-
-#define TWL4030_IRQNUM INT_34XX_SYS_NIRQ
-#define LDP_SMC911X_CS 1
-#define LDP_SMC911X_GPIO 152
-#define DEBUG_BASE 0x08000000
-#define OMAP34XX_ETHR_START DEBUG_BASE
-#endif /* __ASM_ARCH_OMAP_LDP_H */
diff --git a/arch/arm/plat-omap/include/mach/board-nokia.h b/arch/arm/plat-omap/include/mach/board-nokia.h
deleted file mode 100644
index 2abbe001af8..00000000000
--- a/arch/arm/plat-omap/include/mach/board-nokia.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * arch/arm/plat-omap/include/mach/board-nokia.h
- *
- * Information structures for Nokia-specific board config data
- *
- * Copyright (C) 2005 Nokia Corporation
- */
-
-#ifndef _OMAP_BOARD_NOKIA_H
-#define _OMAP_BOARD_NOKIA_H
-
-#include <linux/types.h>
-
-#define OMAP_TAG_NOKIA_BT 0x4e01
-#define OMAP_TAG_WLAN_CX3110X 0x4e02
-#define OMAP_TAG_CBUS 0x4e03
-#define OMAP_TAG_EM_ASIC_BB5 0x4e04
-
-
-#define BT_CHIP_CSR 1
-#define BT_CHIP_TI 2
-
-#define BT_SYSCLK_12 1
-#define BT_SYSCLK_38_4 2
-
-struct omap_bluetooth_config {
- u8 chip_type;
- u8 bt_wakeup_gpio;
- u8 host_wakeup_gpio;
- u8 reset_gpio;
- u8 bt_uart;
- u8 bd_addr[6];
- u8 bt_sysclk;
-};
-
-struct omap_wlan_cx3110x_config {
- u8 chip_type;
- s16 power_gpio;
- s16 irq_gpio;
- s16 spi_cs_gpio;
-};
-
-struct omap_cbus_config {
- s16 clk_gpio;
- s16 dat_gpio;
- s16 sel_gpio;
-};
-
-struct omap_em_asic_bb5_config {
- s16 retu_irq_gpio;
- s16 tahvo_irq_gpio;
-};
-
-#endif
diff --git a/arch/arm/plat-omap/include/mach/board-omap3beagle.h b/arch/arm/plat-omap/include/mach/board-omap3beagle.h
deleted file mode 100644
index 3080d52d877..00000000000
--- a/arch/arm/plat-omap/include/mach/board-omap3beagle.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * arch/arm/plat-omap/include/mach/board-omap3beagle.h
- *
- * Hardware definitions for TI OMAP3 BEAGLE.
- *
- * Initial creation by Syed Mohammed Khasim <khasim@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef __ASM_ARCH_OMAP3_BEAGLE_H
-#define __ASM_ARCH_OMAP3_BEAGLE_H
-
-#endif /* __ASM_ARCH_OMAP3_BEAGLE_H */
-
diff --git a/arch/arm/plat-omap/include/mach/board-osk.h b/arch/arm/plat-omap/include/mach/board-osk.h
deleted file mode 100644
index 3850cb1f220..00000000000
--- a/arch/arm/plat-omap/include/mach/board-osk.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * arch/arm/plat-omap/include/mach/board-osk.h
- *
- * Hardware definitions for TI OMAP5912 OSK board.
- *
- * Written by Dirk Behme <dirk.behme@de.bosch.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef __ASM_ARCH_OMAP_OSK_H
-#define __ASM_ARCH_OMAP_OSK_H
-
-/* At OMAP5912 OSK the Ethernet is directly connected to CS1 */
-#define OMAP_OSK_ETHR_START 0x04800300
-
-/* TPS65010 has four GPIOs. nPG and LED2 can be treated like GPIOs with
- * alternate pin configurations for hardware-controlled blinking.
- */
-#define OSK_TPS_GPIO_BASE (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */)
-# define OSK_TPS_GPIO_USB_PWR_EN (OSK_TPS_GPIO_BASE + 0)
-# define OSK_TPS_GPIO_LED_D3 (OSK_TPS_GPIO_BASE + 1)
-# define OSK_TPS_GPIO_LAN_RESET (OSK_TPS_GPIO_BASE + 2)
-# define OSK_TPS_GPIO_DSP_PWR_EN (OSK_TPS_GPIO_BASE + 3)
-# define OSK_TPS_GPIO_LED_D9 (OSK_TPS_GPIO_BASE + 4)
-# define OSK_TPS_GPIO_LED_D2 (OSK_TPS_GPIO_BASE + 5)
-
-#endif /* __ASM_ARCH_OMAP_OSK_H */
-
diff --git a/arch/arm/plat-omap/include/mach/board-overo.h b/arch/arm/plat-omap/include/mach/board-overo.h
deleted file mode 100644
index 7ecae66966d..00000000000
--- a/arch/arm/plat-omap/include/mach/board-overo.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * board-overo.h (Gumstix Overo)
- *
- * Initial code: Steve Sakoman <steve@sakoman.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef __ASM_ARCH_OVERO_H
-#define __ASM_ARCH_OVERO_H
-
-#define OVERO_GPIO_BT_XGATE 15
-#define OVERO_GPIO_W2W_NRESET 16
-#define OVERO_GPIO_BT_NRESET 164
-#define OVERO_GPIO_USBH_CPEN 168
-#define OVERO_GPIO_USBH_NRESET 183
-
-#endif /* ____ASM_ARCH_OVERO_H */
-
diff --git a/arch/arm/plat-omap/include/mach/board-palmte.h b/arch/arm/plat-omap/include/mach/board-palmte.h
deleted file mode 100644
index 6906cdebbcf..00000000000
--- a/arch/arm/plat-omap/include/mach/board-palmte.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * arch/arm/plat-omap/include/mach/board-palmte.h
- *
- * Hardware definitions for the Palm Tungsten E device.
- *
- * Maintainters : http://palmtelinux.sf.net
- * palmtelinux-developpers@lists.sf.net
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __OMAP_BOARD_PALMTE_H
-#define __OMAP_BOARD_PALMTE_H
-
-#define PALMTE_USBDETECT_GPIO 0
-#define PALMTE_USB_OR_DC_GPIO 1
-#define PALMTE_TSC_GPIO 4
-#define PALMTE_PINTDAV_GPIO 6
-#define PALMTE_MMC_WP_GPIO 8
-#define PALMTE_MMC_POWER_GPIO 9
-#define PALMTE_HDQ_GPIO 11
-#define PALMTE_HEADPHONES_GPIO 14
-#define PALMTE_SPEAKER_GPIO 15
-#define PALMTE_DC_GPIO OMAP_MPUIO(2)
-#define PALMTE_MMC_SWITCH_GPIO OMAP_MPUIO(4)
-#define PALMTE_MMC1_GPIO OMAP_MPUIO(6)
-#define PALMTE_MMC2_GPIO OMAP_MPUIO(7)
-#define PALMTE_MMC3_GPIO OMAP_MPUIO(11)
-
-#endif /* __OMAP_BOARD_PALMTE_H */
diff --git a/arch/arm/plat-omap/include/mach/board-palmtt.h b/arch/arm/plat-omap/include/mach/board-palmtt.h
deleted file mode 100644
index e79f382b593..00000000000
--- a/arch/arm/plat-omap/include/mach/board-palmtt.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * arch/arm/plat-omap/include/mach/board-palmte.h
- *
- * Hardware definitions for the Palm Tungsten|T device.
- *
- * Maintainters : Marek Vasut <marek.vasut@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __OMAP_BOARD_PALMTT_H
-#define __OMAP_BOARD_PALMTT_H
-
-#define PALMTT_USBDETECT_GPIO 0
-#define PALMTT_CABLE_GPIO 1
-#define PALMTT_LED_GPIO 3
-#define PALMTT_PENIRQ_GPIO 6
-#define PALMTT_MMC_WP_GPIO 8
-#define PALMTT_HDQ_GPIO 11
-
-#endif /* __OMAP_BOARD_PALMTT_H */
diff --git a/arch/arm/plat-omap/include/mach/board-palmz71.h b/arch/arm/plat-omap/include/mach/board-palmz71.h
deleted file mode 100644
index b1d7d579b31..00000000000
--- a/arch/arm/plat-omap/include/mach/board-palmz71.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * arch/arm/plat-omap/include/mach/board-palmz71.h
- *
- * Hardware definitions for the Palm Zire71 device.
- *
- * Maintainters : Marek Vasut <marek.vasut@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __OMAP_BOARD_PALMZ71_H
-#define __OMAP_BOARD_PALMZ71_H
-
-#define PALMZ71_USBDETECT_GPIO 0
-#define PALMZ71_PENIRQ_GPIO 6
-#define PALMZ71_MMC_WP_GPIO 8
-#define PALMZ71_HDQ_GPIO 11
-
-#define PALMZ71_HOTSYNC_GPIO OMAP_MPUIO(1)
-#define PALMZ71_CABLE_GPIO OMAP_MPUIO(2)
-#define PALMZ71_SLIDER_GPIO OMAP_MPUIO(3)
-#define PALMZ71_MMC_IN_GPIO OMAP_MPUIO(4)
-
-#endif /* __OMAP_BOARD_PALMZ71_H */
diff --git a/arch/arm/plat-omap/include/mach/board-perseus2.h b/arch/arm/plat-omap/include/mach/board-perseus2.h
deleted file mode 100644
index c06c3d717d5..00000000000
--- a/arch/arm/plat-omap/include/mach/board-perseus2.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * arch/arm/plat-omap/include/mach/board-perseus2.h
- *
- * Copyright 2003 by Texas Instruments Incorporated
- * OMAP730 / Perseus2 support by Jean Pihet
- *
- * Copyright (C) 2001 RidgeRun, Inc. (http://www.ridgerun.com)
- * Author: RidgeRun, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#ifndef __ASM_ARCH_OMAP_PERSEUS2_H
-#define __ASM_ARCH_OMAP_PERSEUS2_H
-
-#include <mach/fpga.h>
-
-#ifndef OMAP_SDRAM_DEVICE
-#define OMAP_SDRAM_DEVICE D256M_1X16_4B
-#endif
-
-#endif
diff --git a/arch/arm/plat-omap/include/mach/board-voiceblue.h b/arch/arm/plat-omap/include/mach/board-voiceblue.h
index ed6d346ee12..27916b210f5 100644
--- a/arch/arm/plat-omap/include/mach/board-voiceblue.h
+++ b/arch/arm/plat-omap/include/mach/board-voiceblue.h
@@ -14,7 +14,6 @@
extern void voiceblue_wdt_enable(void);
extern void voiceblue_wdt_disable(void);
extern void voiceblue_wdt_ping(void);
-extern void voiceblue_reset(void);
#endif /* __ASM_ARCH_VOICEBLUE_H */
diff --git a/arch/arm/plat-omap/include/mach/board.h b/arch/arm/plat-omap/include/mach/board.h
index 9466772fc7c..50ea79a0efa 100644
--- a/arch/arm/plat-omap/include/mach/board.h
+++ b/arch/arm/plat-omap/include/mach/board.h
@@ -17,7 +17,6 @@
/* Different peripheral ids */
#define OMAP_TAG_CLOCK 0x4f01
#define OMAP_TAG_SERIAL_CONSOLE 0x4f03
-#define OMAP_TAG_USB 0x4f04
#define OMAP_TAG_LCD 0x4f05
#define OMAP_TAG_GPIO_SWITCH 0x4f06
#define OMAP_TAG_UART 0x4f07
@@ -133,9 +132,6 @@ struct omap_version_config {
char version[12];
};
-
-#include <mach/board-nokia.h>
-
struct omap_board_config_entry {
u16 tag;
u16 len;
diff --git a/arch/arm/plat-omap/include/mach/cpu.h b/arch/arm/plat-omap/include/mach/cpu.h
index 4166a970daa..98b14425236 100644
--- a/arch/arm/plat-omap/include/mach/cpu.h
+++ b/arch/arm/plat-omap/include/mach/cpu.h
@@ -56,6 +56,14 @@ unsigned int omap_rev(void);
# define OMAP_NAME omap730
# endif
#endif
+#ifdef CONFIG_ARCH_OMAP850
+# ifdef OMAP_NAME
+# undef MULTI_OMAP1
+# define MULTI_OMAP1
+# else
+# define OMAP_NAME omap850
+# endif
+#endif
#ifdef CONFIG_ARCH_OMAP15XX
# ifdef OMAP_NAME
# undef MULTI_OMAP1
@@ -105,7 +113,7 @@ unsigned int omap_rev(void);
/*
* Macros to group OMAP into cpu classes.
* These can be used in most places.
- * cpu_is_omap7xx(): True for OMAP730
+ * cpu_is_omap7xx(): True for OMAP730, OMAP850
* cpu_is_omap15xx(): True for OMAP1510, OMAP5910 and OMAP310
* cpu_is_omap16xx(): True for OMAP1610, OMAP5912 and OMAP1710
* cpu_is_omap24xx(): True for OMAP2420, OMAP2422, OMAP2423, OMAP2430
@@ -153,6 +161,10 @@ IS_OMAP_SUBCLASS(343x, 0x343)
# undef cpu_is_omap7xx
# define cpu_is_omap7xx() is_omap7xx()
# endif
+# if defined(CONFIG_ARCH_OMAP850)
+# undef cpu_is_omap7xx
+# define cpu_is_omap7xx() is_omap7xx()
+# endif
# if defined(CONFIG_ARCH_OMAP15XX)
# undef cpu_is_omap15xx
# define cpu_is_omap15xx() is_omap15xx()
@@ -166,6 +178,10 @@ IS_OMAP_SUBCLASS(343x, 0x343)
# undef cpu_is_omap7xx
# define cpu_is_omap7xx() 1
# endif
+# if defined(CONFIG_ARCH_OMAP850)
+# undef cpu_is_omap7xx
+# define cpu_is_omap7xx() 1
+# endif
# if defined(CONFIG_ARCH_OMAP15XX)
# undef cpu_is_omap15xx
# define cpu_is_omap15xx() 1
@@ -219,6 +235,7 @@ IS_OMAP_SUBCLASS(343x, 0x343)
* These are only rarely needed.
* cpu_is_omap330(): True for OMAP330
* cpu_is_omap730(): True for OMAP730
+ * cpu_is_omap850(): True for OMAP850
* cpu_is_omap1510(): True for OMAP1510
* cpu_is_omap1610(): True for OMAP1610
* cpu_is_omap1611(): True for OMAP1611
@@ -241,6 +258,7 @@ static inline int is_omap ##type (void) \
IS_OMAP_TYPE(310, 0x0310)
IS_OMAP_TYPE(730, 0x0730)
+IS_OMAP_TYPE(850, 0x0850)
IS_OMAP_TYPE(1510, 0x1510)
IS_OMAP_TYPE(1610, 0x1610)
IS_OMAP_TYPE(1611, 0x1611)
@@ -255,6 +273,7 @@ IS_OMAP_TYPE(3430, 0x3430)
#define cpu_is_omap310() 0
#define cpu_is_omap730() 0
+#define cpu_is_omap850() 0
#define cpu_is_omap1510() 0
#define cpu_is_omap1610() 0
#define cpu_is_omap5912() 0
@@ -272,12 +291,22 @@ IS_OMAP_TYPE(3430, 0x3430)
# undef cpu_is_omap730
# define cpu_is_omap730() is_omap730()
# endif
+# if defined(CONFIG_ARCH_OMAP850)
+# undef cpu_is_omap850
+# define cpu_is_omap850() is_omap850()
+# endif
#else
# if defined(CONFIG_ARCH_OMAP730)
# undef cpu_is_omap730
# define cpu_is_omap730() 1
# endif
#endif
+#else
+# if defined(CONFIG_ARCH_OMAP850)
+# undef cpu_is_omap850
+# define cpu_is_omap850() 1
+# endif
+#endif
/*
* Whether we have MULTI_OMAP1 or not, we still need to distinguish
@@ -320,7 +349,7 @@ IS_OMAP_TYPE(3430, 0x3430)
#endif
/* Macros to detect if we have OMAP1 or OMAP2 */
-#define cpu_class_is_omap1() (cpu_is_omap730() || cpu_is_omap15xx() || \
+#define cpu_class_is_omap1() (cpu_is_omap7xx() || cpu_is_omap15xx() || \
cpu_is_omap16xx())
#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx())
@@ -392,5 +421,3 @@ int omap_type(void);
void omap2_check_revision(void);
#endif /* defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) */
-
-#endif
diff --git a/arch/arm/plat-omap/include/mach/gpio.h b/arch/arm/plat-omap/include/mach/gpio.h
index 8d9dfe31438..2b22a8799bc 100644
--- a/arch/arm/plat-omap/include/mach/gpio.h
+++ b/arch/arm/plat-omap/include/mach/gpio.h
@@ -31,7 +31,8 @@
#define OMAP_MPUIO_BASE 0xfffb5000
-#ifdef CONFIG_ARCH_OMAP730
+#if (defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850))
+
#define OMAP_MPUIO_INPUT_LATCH 0x00
#define OMAP_MPUIO_OUTPUT 0x02
#define OMAP_MPUIO_IO_CNTL 0x04
diff --git a/arch/arm/plat-omap/include/mach/hardware.h b/arch/arm/plat-omap/include/mach/hardware.h
index 6589ddbb63b..3dc423ed3e8 100644
--- a/arch/arm/plat-omap/include/mach/hardware.h
+++ b/arch/arm/plat-omap/include/mach/hardware.h
@@ -286,78 +286,4 @@
#include "omap24xx.h"
#include "omap34xx.h"
-#ifndef __ASSEMBLER__
-
-/*
- * ---------------------------------------------------------------------------
- * Board specific defines
- * ---------------------------------------------------------------------------
- */
-
-#ifdef CONFIG_MACH_OMAP_INNOVATOR
-#include "board-innovator.h"
-#endif
-
-#ifdef CONFIG_MACH_OMAP_H2
-#include "board-h2.h"
-#endif
-
-#ifdef CONFIG_MACH_OMAP_PERSEUS2
-#include "board-perseus2.h"
-#endif
-
-#ifdef CONFIG_MACH_OMAP_FSAMPLE
-#include "board-fsample.h"
-#endif
-
-#ifdef CONFIG_MACH_OMAP_H3
-#include "board-h3.h"
-#endif
-
-#ifdef CONFIG_MACH_OMAP_H4
-#include "board-h4.h"
-#endif
-
-#ifdef CONFIG_MACH_OMAP_2430SDP
-#include "board-2430sdp.h"
-#endif
-
-#ifdef CONFIG_MACH_OMAP3_BEAGLE
-#include "board-omap3beagle.h"
-#endif
-
-#ifdef CONFIG_MACH_OMAP_LDP
-#include "board-ldp.h"
-#endif
-
-#ifdef CONFIG_MACH_OMAP_APOLLON
-#include "board-apollon.h"
-#endif
-
-#ifdef CONFIG_MACH_OMAP_OSK
-#include "board-osk.h"
-#endif
-
-#ifdef CONFIG_MACH_VOICEBLUE
-#include "board-voiceblue.h"
-#endif
-
-#ifdef CONFIG_MACH_OMAP_PALMTE
-#include "board-palmte.h"
-#endif
-
-#ifdef CONFIG_MACH_OMAP_PALMZ71
-#include "board-palmz71.h"
-#endif
-
-#ifdef CONFIG_MACH_OMAP_PALMTT
-#include "board-palmtt.h"
-#endif
-
-#ifdef CONFIG_MACH_SX1
-#include "board-sx1.h"
-#endif
-
-#endif /* !__ASSEMBLER__ */
-
#endif /* __ASM_ARCH_OMAP_HARDWARE_H */
diff --git a/arch/arm/plat-omap/include/mach/irqs.h b/arch/arm/plat-omap/include/mach/irqs.h
index bed5274c910..7f57ee66f36 100644
--- a/arch/arm/plat-omap/include/mach/irqs.h
+++ b/arch/arm/plat-omap/include/mach/irqs.h
@@ -105,6 +105,29 @@
#define INT_730_SPGIO_WR 29
/*
+ * OMAP-850 specific IRQ numbers for interrupt handler 1
+ */
+#define INT_850_IH2_FIQ 0
+#define INT_850_IH2_IRQ 1
+#define INT_850_USB_NON_ISO 2
+#define INT_850_USB_ISO 3
+#define INT_850_ICR 4
+#define INT_850_EAC 5
+#define INT_850_GPIO_BANK1 6
+#define INT_850_GPIO_BANK2 7
+#define INT_850_GPIO_BANK3 8
+#define INT_850_McBSP2TX 10
+#define INT_850_McBSP2RX 11
+#define INT_850_McBSP2RX_OVF 12
+#define INT_850_LCD_LINE 14
+#define INT_850_GSM_PROTECT 15
+#define INT_850_TIMER3 16
+#define INT_850_GPIO_BANK5 17
+#define INT_850_GPIO_BANK6 18
+#define INT_850_SPGIO_WR 29
+
+
+/*
* IRQ numbers for interrupt handler 2
*
* NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below
@@ -237,6 +260,64 @@
#define INT_730_DMA_CH15 (62 + IH2_BASE)
#define INT_730_NAND (63 + IH2_BASE)
+/*
+ * OMAP-850 specific IRQ numbers for interrupt handler 2
+ */
+#define INT_850_HW_ERRORS (0 + IH2_BASE)
+#define INT_850_NFIQ_PWR_FAIL (1 + IH2_BASE)
+#define INT_850_CFCD (2 + IH2_BASE)
+#define INT_850_CFIREQ (3 + IH2_BASE)
+#define INT_850_I2C (4 + IH2_BASE)
+#define INT_850_PCC (5 + IH2_BASE)
+#define INT_850_MPU_EXT_NIRQ (6 + IH2_BASE)
+#define INT_850_SPI_100K_1 (7 + IH2_BASE)
+#define INT_850_SYREN_SPI (8 + IH2_BASE)
+#define INT_850_VLYNQ (9 + IH2_BASE)
+#define INT_850_GPIO_BANK4 (10 + IH2_BASE)
+#define INT_850_McBSP1TX (11 + IH2_BASE)
+#define INT_850_McBSP1RX (12 + IH2_BASE)
+#define INT_850_McBSP1RX_OF (13 + IH2_BASE)
+#define INT_850_UART_MODEM_IRDA_2 (14 + IH2_BASE)
+#define INT_850_UART_MODEM_1 (15 + IH2_BASE)
+#define INT_850_MCSI (16 + IH2_BASE)
+#define INT_850_uWireTX (17 + IH2_BASE)
+#define INT_850_uWireRX (18 + IH2_BASE)
+#define INT_850_SMC_CD (19 + IH2_BASE)
+#define INT_850_SMC_IREQ (20 + IH2_BASE)
+#define INT_850_HDQ_1WIRE (21 + IH2_BASE)
+#define INT_850_TIMER32K (22 + IH2_BASE)
+#define INT_850_MMC_SDIO (23 + IH2_BASE)
+#define INT_850_UPLD (24 + IH2_BASE)
+#define INT_850_USB_HHC_1 (27 + IH2_BASE)
+#define INT_850_USB_HHC_2 (28 + IH2_BASE)
+#define INT_850_USB_GENI (29 + IH2_BASE)
+#define INT_850_USB_OTG (30 + IH2_BASE)
+#define INT_850_CAMERA_IF (31 + IH2_BASE)
+#define INT_850_RNG (32 + IH2_BASE)
+#define INT_850_DUAL_MODE_TIMER (33 + IH2_BASE)
+#define INT_850_DBB_RF_EN (34 + IH2_BASE)
+#define INT_850_MPUIO_KEYPAD (35 + IH2_BASE)
+#define INT_850_SHA1_MD5 (36 + IH2_BASE)
+#define INT_850_SPI_100K_2 (37 + IH2_BASE)
+#define INT_850_RNG_IDLE (38 + IH2_BASE)
+#define INT_850_MPUIO (39 + IH2_BASE)
+#define INT_850_LLPC_LCD_CTRL_CAN_BE_OFF (40 + IH2_BASE)
+#define INT_850_LLPC_OE_FALLING (41 + IH2_BASE)
+#define INT_850_LLPC_OE_RISING (42 + IH2_BASE)
+#define INT_850_LLPC_VSYNC (43 + IH2_BASE)
+#define INT_850_WAKE_UP_REQ (46 + IH2_BASE)
+#define INT_850_DMA_CH6 (53 + IH2_BASE)
+#define INT_850_DMA_CH7 (54 + IH2_BASE)
+#define INT_850_DMA_CH8 (55 + IH2_BASE)
+#define INT_850_DMA_CH9 (56 + IH2_BASE)
+#define INT_850_DMA_CH10 (57 + IH2_BASE)
+#define INT_850_DMA_CH11 (58 + IH2_BASE)
+#define INT_850_DMA_CH12 (59 + IH2_BASE)
+#define INT_850_DMA_CH13 (60 + IH2_BASE)
+#define INT_850_DMA_CH14 (61 + IH2_BASE)
+#define INT_850_DMA_CH15 (62 + IH2_BASE)
+#define INT_850_NAND (63 + IH2_BASE)
+
#define INT_24XX_SYS_NIRQ 7
#define INT_24XX_SDMA_IRQ0 12
#define INT_24XX_SDMA_IRQ1 13
@@ -341,7 +422,7 @@
#define INT_34XX_BENCH_MPU_EMUL 3
-/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730) and
+/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730/850) and
* 16 MPUIO lines */
#define OMAP_MAX_GPIO_LINES 192
#define IH_GPIO_BASE (128 + IH2_BASE)
diff --git a/arch/arm/plat-omap/include/mach/mailbox.h b/arch/arm/plat-omap/include/mach/mailbox.h
index 7cbed9332e1..b7a6991814e 100644
--- a/arch/arm/plat-omap/include/mach/mailbox.h
+++ b/arch/arm/plat-omap/include/mach/mailbox.h
@@ -33,6 +33,9 @@ struct omap_mbox_ops {
void (*disable_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq);
void (*ack_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq);
int (*is_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq);
+ /* ctx */
+ void (*save_ctx)(struct omap_mbox *mbox);
+ void (*restore_ctx)(struct omap_mbox *mbox);
};
struct omap_mbox_queue {
@@ -53,7 +56,7 @@ struct omap_mbox {
mbox_msg_t seq_snd, seq_rcv;
- struct device dev;
+ struct device *dev;
struct omap_mbox *next;
void *priv;
@@ -67,7 +70,27 @@ void omap_mbox_init_seq(struct omap_mbox *);
struct omap_mbox *omap_mbox_get(const char *);
void omap_mbox_put(struct omap_mbox *);
-int omap_mbox_register(struct omap_mbox *);
+int omap_mbox_register(struct device *parent, struct omap_mbox *);
int omap_mbox_unregister(struct omap_mbox *);
+static inline void omap_mbox_save_ctx(struct omap_mbox *mbox)
+{
+ if (!mbox->ops->save_ctx) {
+ dev_err(mbox->dev, "%s:\tno save\n", __func__);
+ return;
+ }
+
+ mbox->ops->save_ctx(mbox);
+}
+
+static inline void omap_mbox_restore_ctx(struct omap_mbox *mbox)
+{
+ if (!mbox->ops->restore_ctx) {
+ dev_err(mbox->dev, "%s:\tno restore\n", __func__);
+ return;
+ }
+
+ mbox->ops->restore_ctx(mbox);
+}
+
#endif /* MAILBOX_H */
diff --git a/arch/arm/plat-omap/include/mach/mmc.h b/arch/arm/plat-omap/include/mach/mmc.h
index 73a9e15031b..4435bd434e1 100644
--- a/arch/arm/plat-omap/include/mach/mmc.h
+++ b/arch/arm/plat-omap/include/mach/mmc.h
@@ -37,6 +37,8 @@
#define OMAP_MMC_MAX_SLOTS 2
struct omap_mmc_platform_data {
+ /* back-link to device */
+ struct device *dev;
/* number of slots per controller */
unsigned nr_slots:2;
diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/mach/mux.h
index f4362b8682c..85a62170576 100644
--- a/arch/arm/plat-omap/include/mach/mux.h
+++ b/arch/arm/plat-omap/include/mach/mux.h
@@ -61,6 +61,16 @@
.pull_bit = bit, \
.pull_val = status,
+#define MUX_REG_850(reg, mode_offset, mode) .mux_reg_name = "OMAP850_IO_CONF_"#reg, \
+ .mux_reg = OMAP850_IO_CONF_##reg, \
+ .mask_offset = mode_offset, \
+ .mask = mode,
+
+#define PULL_REG_850(reg, bit, status) .pull_name = "OMAP850_IO_CONF_"#reg, \
+ .pull_reg = OMAP850_IO_CONF_##reg, \
+ .pull_bit = bit, \
+ .pull_val = status,
+
#else
#define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, \
@@ -83,6 +93,15 @@
.pull_bit = bit, \
.pull_val = status,
+#define MUX_REG_850(reg, mode_offset, mode) \
+ .mux_reg = OMAP850_IO_CONF_##reg, \
+ .mask_offset = mode_offset, \
+ .mask = mode,
+
+#define PULL_REG_850(reg, bit, status) .pull_reg = OMAP850_IO_CONF_##reg, \
+ .pull_bit = bit, \
+ .pull_val = status,
+
#endif /* CONFIG_OMAP_MUX_DEBUG */
#define MUX_CFG(desc, mux_reg, mode_offset, mode, \
@@ -98,7 +117,7 @@
/*
- * OMAP730 has a slightly different config for the pin mux.
+ * OMAP730/850 has a slightly different config for the pin mux.
* - config regs are the OMAP730_IO_CONF_x regs (see omap730.h) regs and
* not the FUNC_MUX_CTRL_x regs from hardware.h
* - for pull-up/down, only has one enable bit which is is in the same register
@@ -114,6 +133,17 @@
PU_PD_REG(NA, 0) \
},
+#define MUX_CFG_850(desc, mux_reg, mode_offset, mode, \
+ pull_bit, pull_status, debug_status)\
+{ \
+ .name = desc, \
+ .debug = debug_status, \
+ MUX_REG_850(mux_reg, mode_offset, mode) \
+ PULL_REG_850(mux_reg, pull_bit, pull_status) \
+ PU_PD_REG(NA, 0) \
+},
+
+
#define MUX_CFG_24XX(desc, reg_offset, mode, \
pull_en, pull_mode, dbg) \
{ \
@@ -221,6 +251,26 @@ enum omap730_index {
W17_730_USB_VBUSI,
};
+enum omap850_index {
+ /* OMAP 850 keyboard */
+ E2_850_KBR0,
+ J7_850_KBR1,
+ E1_850_KBR2,
+ F3_850_KBR3,
+ D2_850_KBR4,
+ C2_850_KBC0,
+ D3_850_KBC1,
+ E4_850_KBC2,
+ F4_850_KBC3,
+ E3_850_KBC4,
+
+ /* USB */
+ AA17_850_USB_DM,
+ W16_850_USB_PU_EN,
+ W17_850_USB_VBUSI,
+};
+
+
enum omap1xxx_index {
/* UART1 (BT_UART_GATING)*/
UART1_TX = 0,
@@ -788,7 +838,20 @@ enum omap34xx_index {
* - "_DOWN" suffix (GPIO3_DOWN) with internal pulldown
* - "_OUT" suffix (GPIO3_OUT) for output-only pins (unlike 24xx)
*/
+ AF26_34XX_GPIO0,
+ AF22_34XX_GPIO9,
AH8_34XX_GPIO29,
+ U8_34XX_GPIO54_OUT,
+ U8_34XX_GPIO54_DOWN,
+ L8_34XX_GPIO63,
+ G25_34XX_GPIO86_OUT,
+ AG4_34XX_GPIO134_OUT,
+ AE4_34XX_GPIO136_OUT,
+ AF6_34XX_GPIO140_UP,
+ AE6_34XX_GPIO141,
+ AF5_34XX_GPIO142,
+ AE5_34XX_GPIO143,
+ H19_34XX_GPIO164_OUT,
J25_34XX_GPIO170,
};
diff --git a/arch/arm/plat-omap/include/mach/omap34xx.h b/arch/arm/plat-omap/include/mach/omap34xx.h
index 8e0479fff05..1b1c35d2169 100644
--- a/arch/arm/plat-omap/include/mach/omap34xx.h
+++ b/arch/arm/plat-omap/include/mach/omap34xx.h
@@ -49,6 +49,33 @@
#define OMAP343X_CTRL_BASE OMAP343X_SCM_BASE
#define OMAP34XX_IC_BASE 0x48200000
+
+#define OMAP3430_ISP_BASE (L4_34XX_BASE + 0xBC000)
+#define OMAP3430_ISP_CBUFF_BASE (OMAP3430_ISP_BASE + 0x0100)
+#define OMAP3430_ISP_CCP2_BASE (OMAP3430_ISP_BASE + 0x0400)
+#define OMAP3430_ISP_CCDC_BASE (OMAP3430_ISP_BASE + 0x0600)
+#define OMAP3430_ISP_HIST_BASE (OMAP3430_ISP_BASE + 0x0A00)
+#define OMAP3430_ISP_H3A_BASE (OMAP3430_ISP_BASE + 0x0C00)
+#define OMAP3430_ISP_PREV_BASE (OMAP3430_ISP_BASE + 0x0E00)
+#define OMAP3430_ISP_RESZ_BASE (OMAP3430_ISP_BASE + 0x1000)
+#define OMAP3430_ISP_SBL_BASE (OMAP3430_ISP_BASE + 0x1200)
+#define OMAP3430_ISP_MMU_BASE (OMAP3430_ISP_BASE + 0x1400)
+#define OMAP3430_ISP_CSI2A_BASE (OMAP3430_ISP_BASE + 0x1800)
+#define OMAP3430_ISP_CSI2PHY_BASE (OMAP3430_ISP_BASE + 0x1970)
+
+#define OMAP3430_ISP_END (OMAP3430_ISP_BASE + 0x06F)
+#define OMAP3430_ISP_CBUFF_END (OMAP3430_ISP_CBUFF_BASE + 0x077)
+#define OMAP3430_ISP_CCP2_END (OMAP3430_ISP_CCP2_BASE + 0x1EF)
+#define OMAP3430_ISP_CCDC_END (OMAP3430_ISP_CCDC_BASE + 0x0A7)
+#define OMAP3430_ISP_HIST_END (OMAP3430_ISP_HIST_BASE + 0x047)
+#define OMAP3430_ISP_H3A_END (OMAP3430_ISP_H3A_BASE + 0x05F)
+#define OMAP3430_ISP_PREV_END (OMAP3430_ISP_PREV_BASE + 0x09F)
+#define OMAP3430_ISP_RESZ_END (OMAP3430_ISP_RESZ_BASE + 0x0AB)
+#define OMAP3430_ISP_SBL_END (OMAP3430_ISP_SBL_BASE + 0x0FB)
+#define OMAP3430_ISP_MMU_END (OMAP3430_ISP_MMU_BASE + 0x06F)
+#define OMAP3430_ISP_CSI2A_END (OMAP3430_ISP_CSI2A_BASE + 0x16F)
+#define OMAP3430_ISP_CSI2PHY_END (OMAP3430_ISP_CSI2PHY_BASE + 0x007)
+
#define OMAP34XX_IVA_INTC_BASE 0x40000000
#define OMAP34XX_HSUSB_OTG_BASE (L4_34XX_BASE + 0xAB000)
#define OMAP34XX_HSUSB_HOST_BASE (L4_34XX_BASE + 0x64000)
@@ -61,6 +88,7 @@
#define OMAP2_CM_BASE OMAP3430_CM_BASE
#define OMAP2_PRM_BASE OMAP3430_PRM_BASE
#define OMAP2_VA_IC_BASE IO_ADDRESS(OMAP34XX_IC_BASE)
+#define OMAP34XX_MAILBOX_BASE (L4_34XX_BASE + 0x94000)
#endif
diff --git a/arch/arm/plat-omap/include/mach/omap850.h b/arch/arm/plat-omap/include/mach/omap850.h
new file mode 100644
index 00000000000..c33f6798171
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/omap850.h
@@ -0,0 +1,102 @@
+/* arch/arm/plat-omap/include/mach/omap850.h
+ *
+ * Hardware definitions for TI OMAP850 processor.
+ *
+ * Derived from omap730.h by Zebediah C. McClure <zmc@lurian.net>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __ASM_ARCH_OMAP850_H
+#define __ASM_ARCH_OMAP850_H
+
+/*
+ * ----------------------------------------------------------------------------
+ * Base addresses
+ * ----------------------------------------------------------------------------
+ */
+
+/* Syntax: XX_BASE = Virtual base address, XX_START = Physical base address */
+
+#define OMAP850_DSP_BASE 0xE0000000
+#define OMAP850_DSP_SIZE 0x50000
+#define OMAP850_DSP_START 0xE0000000
+
+#define OMAP850_DSPREG_BASE 0xE1000000
+#define OMAP850_DSPREG_SIZE SZ_128K
+#define OMAP850_DSPREG_START 0xE1000000
+
+/*
+ * ----------------------------------------------------------------------------
+ * OMAP850 specific configuration registers
+ * ----------------------------------------------------------------------------
+ */
+#define OMAP850_CONFIG_BASE 0xfffe1000
+#define OMAP850_IO_CONF_0 0xfffe1070
+#define OMAP850_IO_CONF_1 0xfffe1074
+#define OMAP850_IO_CONF_2 0xfffe1078
+#define OMAP850_IO_CONF_3 0xfffe107c
+#define OMAP850_IO_CONF_4 0xfffe1080
+#define OMAP850_IO_CONF_5 0xfffe1084
+#define OMAP850_IO_CONF_6 0xfffe1088
+#define OMAP850_IO_CONF_7 0xfffe108c
+#define OMAP850_IO_CONF_8 0xfffe1090
+#define OMAP850_IO_CONF_9 0xfffe1094
+#define OMAP850_IO_CONF_10 0xfffe1098
+#define OMAP850_IO_CONF_11 0xfffe109c
+#define OMAP850_IO_CONF_12 0xfffe10a0
+#define OMAP850_IO_CONF_13 0xfffe10a4
+
+#define OMAP850_MODE_1 0xfffe1010
+#define OMAP850_MODE_2 0xfffe1014
+
+/* CSMI specials: in terms of base + offset */
+#define OMAP850_MODE2_OFFSET 0x14
+
+/*
+ * ----------------------------------------------------------------------------
+ * OMAP850 traffic controller configuration registers
+ * ----------------------------------------------------------------------------
+ */
+#define OMAP850_FLASH_CFG_0 0xfffecc10
+#define OMAP850_FLASH_ACFG_0 0xfffecc50
+#define OMAP850_FLASH_CFG_1 0xfffecc14
+#define OMAP850_FLASH_ACFG_1 0xfffecc54
+
+/*
+ * ----------------------------------------------------------------------------
+ * OMAP850 DSP control registers
+ * ----------------------------------------------------------------------------
+ */
+#define OMAP850_ICR_BASE 0xfffbb800
+#define OMAP850_DSP_M_CTL 0xfffbb804
+#define OMAP850_DSP_MMU_BASE 0xfffed200
+
+/*
+ * ----------------------------------------------------------------------------
+ * OMAP850 PCC_UPLD configuration registers
+ * ----------------------------------------------------------------------------
+ */
+#define OMAP850_PCC_UPLD_CTRL_BASE (0xfffe0900)
+#define OMAP850_PCC_UPLD_CTRL (OMAP850_PCC_UPLD_CTRL_BASE + 0x00)
+
+#endif /* __ASM_ARCH_OMAP850_H */
+
diff --git a/arch/arm/plat-omap/include/mach/system.h b/arch/arm/plat-omap/include/mach/system.h
index cb8c0ef30fb..1060e345423 100644
--- a/arch/arm/plat-omap/include/mach/system.h
+++ b/arch/arm/plat-omap/include/mach/system.h
@@ -13,6 +13,8 @@
#ifndef CONFIG_MACH_VOICEBLUE
#define voiceblue_reset() do {} while (0)
+#else
+extern void voiceblue_reset(void);
#endif
static inline void arch_idle(void)
diff --git a/arch/arm/plat-omap/include/mach/usb.h b/arch/arm/plat-omap/include/mach/usb.h
index a56a610950c..69f0ceed500 100644
--- a/arch/arm/plat-omap/include/mach/usb.h
+++ b/arch/arm/plat-omap/include/mach/usb.h
@@ -27,8 +27,18 @@
#define UDC_BASE OMAP2_UDC_BASE
#define OMAP_OHCI_BASE OMAP2_OHCI_BASE
+#ifdef CONFIG_USB_MUSB_SOC
+extern void usb_musb_init(void);
+#else
+static inline void usb_musb_init(void)
+{
+}
+#endif
+
#endif
+void omap_usb_init(struct omap_usb_config *pdata);
+
/*-------------------------------------------------------------------------*/
/*
diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c
index b52ce053e6f..0abfbaa5987 100644
--- a/arch/arm/plat-omap/mailbox.c
+++ b/arch/arm/plat-omap/mailbox.c
@@ -1,10 +1,9 @@
/*
* OMAP mailbox driver
*
- * Copyright (C) 2006 Nokia Corporation. All rights reserved.
+ * Copyright (C) 2006-2009 Nokia Corporation. All rights reserved.
*
- * Contact: Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
- * Restructured by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
+ * Contact: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -22,21 +21,98 @@
*
*/
-#include <linux/init.h>
#include <linux/module.h>
-#include <linux/sched.h>
#include <linux/interrupt.h>
#include <linux/device.h>
-#include <linux/blkdev.h>
-#include <linux/err.h>
#include <linux/delay.h>
-#include <linux/io.h>
+
#include <mach/mailbox.h>
-#include "mailbox.h"
+
+static int enable_seq_bit;
+module_param(enable_seq_bit, bool, 0);
+MODULE_PARM_DESC(enable_seq_bit, "Enable sequence bit checking.");
static struct omap_mbox *mboxes;
static DEFINE_RWLOCK(mboxes_lock);
+/*
+ * Mailbox sequence bit API
+ */
+
+/* seq_rcv should be initialized with any value other than
+ * 0 and 1 << 31, to allow either value for the first
+ * message. */
+static inline void mbox_seq_init(struct omap_mbox *mbox)
+{
+ if (!enable_seq_bit)
+ return;
+
+ /* any value other than 0 and 1 << 31 */
+ mbox->seq_rcv = 0xffffffff;
+}
+
+static inline void mbox_seq_toggle(struct omap_mbox *mbox, mbox_msg_t * msg)
+{
+ if (!enable_seq_bit)
+ return;
+
+ /* add seq_snd to msg */
+ *msg = (*msg & 0x7fffffff) | mbox->seq_snd;
+ /* flip seq_snd */
+ mbox->seq_snd ^= 1 << 31;
+}
+
+static inline int mbox_seq_test(struct omap_mbox *mbox, mbox_msg_t msg)
+{
+ mbox_msg_t seq;
+
+ if (!enable_seq_bit)
+ return 0;
+
+ seq = msg & (1 << 31);
+ if (seq == mbox->seq_rcv)
+ return -1;
+ mbox->seq_rcv = seq;
+ return 0;
+}
+
+/* Mailbox FIFO handle functions */
+static inline mbox_msg_t mbox_fifo_read(struct omap_mbox *mbox)
+{
+ return mbox->ops->fifo_read(mbox);
+}
+static inline void mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg)
+{
+ mbox->ops->fifo_write(mbox, msg);
+}
+static inline int mbox_fifo_empty(struct omap_mbox *mbox)
+{
+ return mbox->ops->fifo_empty(mbox);
+}
+static inline int mbox_fifo_full(struct omap_mbox *mbox)
+{
+ return mbox->ops->fifo_full(mbox);
+}
+
+/* Mailbox IRQ handle functions */
+static inline void enable_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
+{
+ mbox->ops->enable_irq(mbox, irq);
+}
+static inline void disable_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
+{
+ mbox->ops->disable_irq(mbox, irq);
+}
+static inline void ack_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
+{
+ if (mbox->ops->ack_irq)
+ mbox->ops->ack_irq(mbox, irq);
+}
+static inline int is_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
+{
+ return mbox->ops->is_irq(mbox, irq);
+}
+
/* Mailbox Sequence Bit function */
void omap_mbox_init_seq(struct omap_mbox *mbox)
{
@@ -136,7 +212,7 @@ static void mbox_rx_work(struct work_struct *work)
unsigned long flags;
if (mbox->rxq->callback == NULL) {
- sysfs_notify(&mbox->dev.kobj, NULL, "mbox");
+ sysfs_notify(&mbox->dev->kobj, NULL, "mbox");
return;
}
@@ -204,7 +280,7 @@ static void __mbox_rx_interrupt(struct omap_mbox *mbox)
/* no more messages in the fifo. clear IRQ source. */
ack_mbox_irq(mbox, IRQ_RX);
enable_mbox_irq(mbox, IRQ_RX);
- nomem:
+nomem:
schedule_work(&mbox->rxq->work);
}
@@ -286,7 +362,7 @@ static ssize_t mbox_show(struct class *class, char *buf)
static CLASS_ATTR(mbox, S_IRUGO, mbox_show, NULL);
static struct class omap_mbox_class = {
- .name = "omap_mbox",
+ .name = "omap-mailbox",
};
static struct omap_mbox_queue *mbox_queue_alloc(struct omap_mbox *mbox,
@@ -333,21 +409,6 @@ static int omap_mbox_init(struct omap_mbox *mbox)
return ret;
}
- mbox->dev.class = &omap_mbox_class;
- dev_set_name(&mbox->dev, "%s", mbox->name);
- dev_set_drvdata(&mbox->dev, mbox);
-
- ret = device_register(&mbox->dev);
- if (unlikely(ret))
- goto fail_device_reg;
-
- ret = device_create_file(&mbox->dev, &dev_attr_mbox);
- if (unlikely(ret)) {
- printk(KERN_ERR
- "device_create_file failed: %d\n", ret);
- goto fail_create_mbox;
- }
-
ret = request_irq(mbox->irq, mbox_interrupt, IRQF_DISABLED,
mbox->name, mbox);
if (unlikely(ret)) {
@@ -377,10 +438,6 @@ static int omap_mbox_init(struct omap_mbox *mbox)
fail_alloc_txq:
free_irq(mbox->irq, mbox);
fail_request_irq:
- device_remove_file(&mbox->dev, &dev_attr_mbox);
- fail_create_mbox:
- device_unregister(&mbox->dev);
- fail_device_reg:
if (unlikely(mbox->ops->shutdown))
mbox->ops->shutdown(mbox);
@@ -393,8 +450,6 @@ static void omap_mbox_fini(struct omap_mbox *mbox)
mbox_queue_free(mbox->rxq);
free_irq(mbox->irq, mbox);
- device_remove_file(&mbox->dev, &dev_attr_mbox);
- class_unregister(&omap_mbox_class);
if (unlikely(mbox->ops->shutdown))
mbox->ops->shutdown(mbox);
@@ -440,7 +495,7 @@ void omap_mbox_put(struct omap_mbox *mbox)
}
EXPORT_SYMBOL(omap_mbox_put);
-int omap_mbox_register(struct omap_mbox *mbox)
+int omap_mbox_register(struct device *parent, struct omap_mbox *mbox)
{
int ret = 0;
struct omap_mbox **tmp;
@@ -450,14 +505,31 @@ int omap_mbox_register(struct omap_mbox *mbox)
if (mbox->next)
return -EBUSY;
+ mbox->dev = device_create(&omap_mbox_class,
+ parent, 0, mbox, "%s", mbox->name);
+ if (IS_ERR(mbox->dev))
+ return PTR_ERR(mbox->dev);
+
+ ret = device_create_file(mbox->dev, &dev_attr_mbox);
+ if (ret)
+ goto err_sysfs;
+
write_lock(&mboxes_lock);
tmp = find_mboxes(mbox->name);
- if (*tmp)
+ if (*tmp) {
ret = -EBUSY;
- else
- *tmp = mbox;
+ write_unlock(&mboxes_lock);
+ goto err_find;
+ }
+ *tmp = mbox;
write_unlock(&mboxes_lock);
+ return 0;
+
+err_find:
+ device_remove_file(mbox->dev, &dev_attr_mbox);
+err_sysfs:
+ device_unregister(mbox->dev);
return ret;
}
EXPORT_SYMBOL(omap_mbox_register);
@@ -473,6 +545,8 @@ int omap_mbox_unregister(struct omap_mbox *mbox)
*tmp = mbox->next;
mbox->next = NULL;
write_unlock(&mboxes_lock);
+ device_remove_file(mbox->dev, &dev_attr_mbox);
+ device_unregister(mbox->dev);
return 0;
}
tmp = &(*tmp)->next;
@@ -501,4 +575,6 @@ static void __exit omap_mbox_class_exit(void)
subsys_initcall(omap_mbox_class_init);
module_exit(omap_mbox_class_exit);
-MODULE_LICENSE("GPL");
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("omap mailbox: interrupt driven messaging");
+MODULE_AUTHOR("Toshihiro Kobayashi and Hiroshi DOYU");
diff --git a/arch/arm/plat-omap/mailbox.h b/arch/arm/plat-omap/mailbox.h
deleted file mode 100644
index 67c6740b8ad..00000000000
--- a/arch/arm/plat-omap/mailbox.h
+++ /dev/null
@@ -1,100 +0,0 @@
-/*
- * Mailbox internal functions
- *
- * Copyright (C) 2006 Nokia Corporation
- * Written by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#ifndef __ARCH_ARM_PLAT_MAILBOX_H
-#define __ARCH_ARM_PLAT_MAILBOX_H
-
-/*
- * Mailbox sequence bit API
- */
-#if defined(CONFIG_ARCH_OMAP1)
-# define MBOX_USE_SEQ_BIT
-#elif defined(CONFIG_ARCH_OMAP2)
-# define MBOX_USE_SEQ_BIT
-#endif
-
-#ifdef MBOX_USE_SEQ_BIT
-/* seq_rcv should be initialized with any value other than
- * 0 and 1 << 31, to allow either value for the first
- * message. */
-static inline void mbox_seq_init(struct omap_mbox *mbox)
-{
- /* any value other than 0 and 1 << 31 */
- mbox->seq_rcv = 0xffffffff;
-}
-
-static inline void mbox_seq_toggle(struct omap_mbox *mbox, mbox_msg_t * msg)
-{
- /* add seq_snd to msg */
- *msg = (*msg & 0x7fffffff) | mbox->seq_snd;
- /* flip seq_snd */
- mbox->seq_snd ^= 1 << 31;
-}
-
-static inline int mbox_seq_test(struct omap_mbox *mbox, mbox_msg_t msg)
-{
- mbox_msg_t seq = msg & (1 << 31);
- if (seq == mbox->seq_rcv)
- return -1;
- mbox->seq_rcv = seq;
- return 0;
-}
-#else
-static inline void mbox_seq_init(struct omap_mbox *mbox)
-{
-}
-static inline void mbox_seq_toggle(struct omap_mbox *mbox, mbox_msg_t * msg)
-{
-}
-static inline int mbox_seq_test(struct omap_mbox *mbox, mbox_msg_t msg)
-{
- return 0;
-}
-#endif
-
-/* Mailbox FIFO handle functions */
-static inline mbox_msg_t mbox_fifo_read(struct omap_mbox *mbox)
-{
- return mbox->ops->fifo_read(mbox);
-}
-static inline void mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg)
-{
- mbox->ops->fifo_write(mbox, msg);
-}
-static inline int mbox_fifo_empty(struct omap_mbox *mbox)
-{
- return mbox->ops->fifo_empty(mbox);
-}
-static inline int mbox_fifo_full(struct omap_mbox *mbox)
-{
- return mbox->ops->fifo_full(mbox);
-}
-
-/* Mailbox IRQ handle functions */
-static inline void enable_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
-{
- mbox->ops->enable_irq(mbox, irq);
-}
-static inline void disable_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
-{
- mbox->ops->disable_irq(mbox, irq);
-}
-static inline void ack_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
-{
- if (mbox->ops->ack_irq)
- mbox->ops->ack_irq(mbox, irq);
-}
-static inline int is_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
-{
- return mbox->ops->is_irq(mbox, irq);
-}
-
-#endif /* __ARCH_ARM_PLAT_MAILBOX_H */
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index be7bcaf2b83..fa5297d643d 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -148,7 +148,7 @@ void __init omap_detect_sram(void)
omap_sram_base = OMAP1_SRAM_VA;
omap_sram_start = OMAP1_SRAM_PA;
- if (cpu_is_omap730())
+ if (cpu_is_omap7xx())
omap_sram_size = 0x32000; /* 200K */
else if (cpu_is_omap15xx())
omap_sram_size = 0x30000; /* 192K */
diff --git a/arch/arm/plat-omap/usb.c b/arch/arm/plat-omap/usb.c
index e278de6862a..509f2ed99e2 100644
--- a/arch/arm/plat-omap/usb.c
+++ b/arch/arm/plat-omap/usb.c
@@ -729,30 +729,13 @@ static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
/*-------------------------------------------------------------------------*/
-static struct omap_usb_config platform_data;
-
-static int __init
-omap_usb_init(void)
+void __init omap_usb_init(struct omap_usb_config *pdata)
{
- const struct omap_usb_config *config;
-
- config = omap_get_config(OMAP_TAG_USB, struct omap_usb_config);
- if (config == NULL) {
- printk(KERN_ERR "USB: No board-specific "
- "platform config found\n");
- return -ENODEV;
- }
- platform_data = *config;
-
if (cpu_is_omap730() || cpu_is_omap16xx() || cpu_is_omap24xx())
- omap_otg_init(&platform_data);
+ omap_otg_init(pdata);
else if (cpu_is_omap15xx())
- omap_1510_usb_init(&platform_data);
- else {
+ omap_1510_usb_init(pdata);
+ else
printk(KERN_ERR "USB: No init for your chip yet\n");
- return -ENODEV;
- }
- return 0;
}
-subsys_initcall(omap_usb_init);