diff options
author | Ben Dooks <ben-linux@fluff.org> | 2008-10-21 14:06:51 +0100 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2008-12-15 21:51:22 +0000 |
commit | d9b79fb56829de34eaddb01b405216eddd0d3b10 (patch) | |
tree | 3b22ecbb2946d237590f34efd558ac58fb8fc90b /arch/arm/plat-s3c64xx/include/plat/irqs.h | |
parent | d626aeedc96e21a048f1a300cd6360f3a7be10f2 (diff) |
[ARM] S3C64XX: Add VIC0 and VIC1 sourced interripts
Add and initialise the two VIC (PL192) found on
the S3C64XX series CPUs.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c64xx/include/plat/irqs.h')
-rw-r--r-- | arch/arm/plat-s3c64xx/include/plat/irqs.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/plat-s3c64xx/include/plat/irqs.h b/arch/arm/plat-s3c64xx/include/plat/irqs.h index 0092b5cba4a..3564dfbec85 100644 --- a/arch/arm/plat-s3c64xx/include/plat/irqs.h +++ b/arch/arm/plat-s3c64xx/include/plat/irqs.h @@ -24,6 +24,9 @@ #define S3C_IRQ(x) ((x) + S3C_IRQ_OFFSET) +#define S3C_VIC0_BASE S3C_IRQ(0) +#define S3C_VIC1_BASE S3C_IRQ(32) + /* UART interrupts, each UART has 4 intterupts per channel so * use the space between the ISA and S3C main interrupts. Note, these * are not in the same order as the S3C24XX series! */ |