diff options
author | Ingo Molnar <mingo@elte.hu> | 2009-06-17 13:06:17 +0200 |
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committer | Ingo Molnar <mingo@elte.hu> | 2009-06-17 13:06:17 +0200 |
commit | a3d06cc6aa3e765dc2bf98626f87272dcf641dca (patch) | |
tree | aa3e49b58f08d6c0ea55cdca4fb5e6c8ba6ae333 /arch/arm/plat-stmp3xxx/include/mach/system.h | |
parent | 0990b1c65729012a63e0eeca93aaaafea4e9a064 (diff) | |
parent | 65795efbd380a832ae508b04dba8f8e53f0b84d9 (diff) |
Merge branch 'linus' into perfcounters/core
Conflicts:
arch/x86/include/asm/kmap_types.h
include/linux/mm.h
include/asm-generic/kmap_types.h
Merge reason: We crossed changes with kmap_types.h cleanups in mainline.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/arm/plat-stmp3xxx/include/mach/system.h')
-rw-r--r-- | arch/arm/plat-stmp3xxx/include/mach/system.h | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/arch/arm/plat-stmp3xxx/include/mach/system.h b/arch/arm/plat-stmp3xxx/include/mach/system.h new file mode 100644 index 00000000000..28a98888931 --- /dev/null +++ b/arch/arm/plat-stmp3xxx/include/mach/system.h @@ -0,0 +1,49 @@ +/* + * Copyright (C) 2005 Sigmatel Inc + * + * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +#include <asm/proc-fns.h> +#include <mach/platform.h> +#include <mach/regs-clkctrl.h> +#include <mach/regs-power.h> + +static inline void arch_idle(void) +{ + /* + * This should do all the clock switching + * and wait for interrupt tricks + */ + + cpu_do_idle(); +} + +static inline void arch_reset(char mode, const char *cmd) +{ + /* Set BATTCHRG to default value */ + __raw_writel(0x00010000, REGS_POWER_BASE + HW_POWER_CHARGE); + + /* Set MINPWR to default value */ + __raw_writel(0, REGS_POWER_BASE + HW_POWER_MINPWR); + + /* Reset digital side of chip (but not power or RTC) */ + __raw_writel(BM_CLKCTRL_RESET_DIG, + REGS_CLKCTRL_BASE + HW_CLKCTRL_RESET); + + /* Should not return */ +} + +#endif |