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authorCatalin Marinas <catalin.marinas@arm.com>2009-05-30 14:00:15 +0100
committerCatalin Marinas <catalin.marinas@arm.com>2009-05-30 14:00:15 +0100
commitd71e1352e240dea32d481ad8d662e8de4406ac7e (patch)
tree823bd3c503988520319b4658d1f2a8b8b4cb1328 /arch/arm
parentba3c02636a0743a62cb50b920d36e1c046ab88cf (diff)
Clear the IT state when invoking a Thumb-2 signal handler
If a process is interrupted during an If-Then block and a signal is invoked, the ITSTATE bits must be cleared otherwise the handler would not run correctly. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Joseph S. Myers <joseph@codesourcery.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/include/asm/ptrace.h7
-rw-r--r--arch/arm/kernel/signal.c8
2 files changed, 13 insertions, 2 deletions
diff --git a/arch/arm/include/asm/ptrace.h b/arch/arm/include/asm/ptrace.h
index 236a06b9b7c..4a4290f7b4a 100644
--- a/arch/arm/include/asm/ptrace.h
+++ b/arch/arm/include/asm/ptrace.h
@@ -65,6 +65,13 @@
#define PSR_x 0x0000ff00 /* Extension */
#define PSR_c 0x000000ff /* Control */
+/*
+ * ARMv7 groups of APSR bits
+ */
+#define PSR_ISET_MASK 0x01000010 /* ISA state (J, T) mask */
+#define PSR_IT_MASK 0x0600fc00 /* If-Then execution state mask */
+#define PSR_ENDIAN_MASK 0x00000200 /* Endianness state mask */
+
#ifndef __ASSEMBLY__
/*
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index 80b8b5c7e07..442b87476f9 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -426,9 +426,13 @@ setup_return(struct pt_regs *regs, struct k_sigaction *ka,
*/
thumb = handler & 1;
- if (thumb)
+ if (thumb) {
cpsr |= PSR_T_BIT;
- else
+#if __LINUX_ARM_ARCH__ >= 7
+ /* clear the If-Then Thumb-2 execution state */
+ cpsr &= ~PSR_IT_MASK;
+#endif
+ } else
cpsr &= ~PSR_T_BIT;
}
#endif