diff options
| author | Graf Yang <graf.yang@analog.com> | 2008-04-24 04:43:14 +0800 |
|---|---|---|
| committer | Bryan Wu <cooloney@kernel.org> | 2008-04-24 04:43:14 +0800 |
| commit | 6ed839423073251b513664fdadb180634aed704b (patch) | |
| tree | 073350299070ba091f4fb4fb146b9a931edc44b8 /arch/blackfin/mach-bf561/head.S | |
| parent | db68254f0639a357309f02cf8707490265fa7a31 (diff) | |
[Blackfin] arch: Resolve the clash issue of UART defines between blackfin headers and include/linux/serial_reg.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Cc: Robin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-bf561/head.S')
| -rw-r--r-- | arch/blackfin/mach-bf561/head.S | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/blackfin/mach-bf561/head.S b/arch/blackfin/mach-bf561/head.S index 96a3d456fb6..279e2e812a2 100644 --- a/arch/blackfin/mach-bf561/head.S +++ b/arch/blackfin/mach-bf561/head.S @@ -139,26 +139,26 @@ ENTRY(__start) /* Initialise UART - when booting from u-boot, the UART is not disabled * so if we dont initalize here, our serial console gets hosed */ - p0.h = hi(UART_LCR); - p0.l = lo(UART_LCR); + p0.h = hi(BFIN_UART_LCR); + p0.l = lo(BFIN_UART_LCR); r0 = 0x0(Z); w[p0] = r0.L; /* To enable DLL writes */ ssync; - p0.h = hi(UART_DLL); - p0.l = lo(UART_DLL); + p0.h = hi(BFIN_UART_DLL); + p0.l = lo(BFIN_UART_DLL); r0 = 0x0(Z); w[p0] = r0.L; ssync; - p0.h = hi(UART_DLH); - p0.l = lo(UART_DLH); + p0.h = hi(BFIN_UART_DLH); + p0.l = lo(BFIN_UART_DLH); r0 = 0x00(Z); w[p0] = r0.L; ssync; - p0.h = hi(UART_GCTL); - p0.l = lo(UART_GCTL); + p0.h = hi(BFIN_UART_GCTL); + p0.l = lo(BFIN_UART_GCTL); r0 = 0x0(Z); w[p0] = r0.L; /* To enable UART clock */ ssync; |