diff options
author | Graf Yang <graf.yang@analog.com> | 2009-01-07 23:14:39 +0800 |
---|---|---|
committer | Bryan Wu <cooloney@kernel.org> | 2009-01-07 23:14:39 +0800 |
commit | dbc895f95500a73ebf1ff12fe85f2e2b3790f52f (patch) | |
tree | 8b60024a7725c559767295b2b3ef143a39111f8b /arch/blackfin/mach-bf561/smp.c | |
parent | f994607a2e118aedf1116a58ecd16126dbb83d28 (diff) |
Blackfin arch: smp patch cleanup from LKML review
1. Use inline get_l1_... functions instead of macro
2. Fix compile issue about smp barrier functions
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-bf561/smp.c')
-rw-r--r-- | arch/blackfin/mach-bf561/smp.c | 11 |
1 files changed, 3 insertions, 8 deletions
diff --git a/arch/blackfin/mach-bf561/smp.c b/arch/blackfin/mach-bf561/smp.c index 23fd4c13897..9b27e698c0b 100644 --- a/arch/blackfin/mach-bf561/smp.c +++ b/arch/blackfin/mach-bf561/smp.c @@ -27,11 +27,6 @@ #include <asm/smp.h> #include <asm/dma.h> -#define COREB_SRAM_BASE 0xff600000 -#define COREB_SRAM_SIZE 0x4000 - -extern char coreb_trampoline_start, coreb_trampoline_end; - static DEFINE_SPINLOCK(boot_lock); static cpumask_t cpu_callin_map; @@ -54,15 +49,15 @@ void __init platform_prepare_cpus(unsigned int max_cpus) int len; len = &coreb_trampoline_end - &coreb_trampoline_start + 1; - BUG_ON(len > COREB_SRAM_SIZE); + BUG_ON(len > L1_CODE_LENGTH); - dma_memcpy((void *)COREB_SRAM_BASE, &coreb_trampoline_start, len); + dma_memcpy((void *)COREB_L1_CODE_START, &coreb_trampoline_start, len); /* Both cores ought to be present on a bf561! */ cpu_set(0, cpu_present_map); /* CoreA */ cpu_set(1, cpu_present_map); /* CoreB */ - printk(KERN_INFO "CoreB bootstrap code to SRAM %p via DMA.\n", (void *)COREB_SRAM_BASE); + printk(KERN_INFO "CoreB bootstrap code to SRAM %p via DMA.\n", (void *)COREB_L1_CODE_START); } int __init setup_profiling_timer(unsigned int multiplier) /* not supported */ |