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authorIngo Molnar <mingo@elte.hu>2009-02-25 16:40:10 +0100
committerIngo Molnar <mingo@elte.hu>2009-02-25 16:40:10 +0100
commit2e31add2a7e2a15d07f592c21ba35870fa9a1d1f (patch)
tree814e2c70fb5528f108114c0da6e5a1e219e6a0e1 /arch/blackfin/mach-common/clocks-init.c
parentd639bab8da86d330493487e8c0fea8ca31f53427 (diff)
parent17581ad812a9abb0182260374ef2e52d4a808a64 (diff)
Merge branch 'x86/urgent' into x86/pat
Diffstat (limited to 'arch/blackfin/mach-common/clocks-init.c')
-rw-r--r--arch/blackfin/mach-common/clocks-init.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/blackfin/mach-common/clocks-init.c b/arch/blackfin/mach-common/clocks-init.c
index 5d182abefc7..9dddb6f8cc8 100644
--- a/arch/blackfin/mach-common/clocks-init.c
+++ b/arch/blackfin/mach-common/clocks-init.c
@@ -14,6 +14,7 @@
#include <asm/clocks.h>
#include <asm/mem_init.h>
+#define SDGCTL_WIDTH (1 << 31) /* SDRAM external data path width */
#define PLL_CTL_VAL \
(((CONFIG_VCO_MULT & 63) << 9) | CLKIN_HALF | \
(PLL_BYPASS << 8) | (ANOMALY_05000265 ? 0x8000 : 0))
@@ -76,7 +77,7 @@ void init_clocks(void)
bfin_write_PLL_DIV(CONFIG_CCLK_ACT_DIV | CONFIG_SCLK_DIV);
#ifdef EBIU_SDGCTL
bfin_write_EBIU_SDRRC(mem_SDRRC);
- bfin_write_EBIU_SDGCTL(mem_SDGCTL);
+ bfin_write_EBIU_SDGCTL((bfin_read_EBIU_SDGCTL() & SDGCTL_WIDTH) | mem_SDGCTL);
#else
bfin_write_EBIU_RSTCTL(bfin_read_EBIU_RSTCTL() & ~(SRREQ));
do_sync();