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authorGraf Yang <graf.yang@analog.com>2009-06-10 08:45:12 +0000
committerMike Frysinger <vapier@gentoo.org>2009-06-13 07:20:11 -0400
commita427293f84ea2491fbdcfbddadc2a2f68e0d2969 (patch)
tree7f4c174e050785354649753ebe8c97c1ada2c2f6 /arch/blackfin
parent53122693c3cef005495279835286c36c58e035e8 (diff)
Blackfin: bf518f-ezbrd: fix SPI CS for SPI flash
The SPI flash on the BF518F-EZBRD board is actually hooked up to CS2, not CS1, so make sure the resources are correct. URL: http://blackfin.uclinux.org/gf/tracker/5220 Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin')
-rw-r--r--arch/blackfin/mach-bf518/boards/ezbrd.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/blackfin/mach-bf518/boards/ezbrd.c b/arch/blackfin/mach-bf518/boards/ezbrd.c
index 8969a24cce7..1382f038235 100644
--- a/arch/blackfin/mach-bf518/boards/ezbrd.c
+++ b/arch/blackfin/mach-bf518/boards/ezbrd.c
@@ -246,7 +246,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
.modalias = "m25p80", /* Name of spi_driver for this device */
.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0, /* Framework bus number */
- .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
+ .chip_select = 2, /* On BF518F-EZBRD it's SPI0_SSEL2 */
.platform_data = &bfin_spi_flash_data,
.controller_data = &spi_flash_chip_info,
.mode = SPI_MODE_3,