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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2006-09-29 15:00:29 +1000
committerPaul Mackerras <paulus@samba.org>2006-10-04 14:52:08 +1000
commit2e194583125bfea94d1ceaa6a32e891643befa7d (patch)
treeedcd8ee247c244727cc828582591fea26c7cd83b /arch/frv/lib/insl_sw.S
parentf3c87a8999c28f2948ebd407574f7e9fb5c577b2 (diff)
[POWERPC] Cell interrupt rework
This patch reworks the cell iic interrupt handling so that: - Node ID is back in the interrupt number (only one IRQ host is created for all nodes). This allows interrupts from sources on another node to be routed non-locally. This will allow possibly one day to fix maxcpus=1 or 2 and still get interrupts from devices on BE 1. (A bit more fixing is needed for that) and it will allow us to implement actual affinity control of external interrupts. - Added handling of the IO exceptions interrupts (badly named, but I re-used the name initially used by STI). Those are the interrupts exposed by IIC_ISR and IIC_IRR, such as the IOC translation exception, performance monitor, etc... Those get their special numbers in the IRQ number space and are internally implemented as a cascade on unit 0xe, class 1 of each node. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/frv/lib/insl_sw.S')
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