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authorBjorn Helgaas <bjorn.helgaas@hp.com>2007-03-30 10:34:05 -0600
committerTony Luck <tony.luck@intel.com>2007-03-30 09:37:41 -0700
commit9b50ffb0c0281bc5a08ccd56ae9bb84296c28f38 (patch)
tree85462c93df91c2fdd0c8fc31643158e9e5cf6734 /arch/ia64/pci/pci.c
parentc4add2e537e6f60048dce8dc518254e7e605301d (diff)
[IA64] make ioremap avoid unsupported attributes
Example memory map (from HP sx1000 with VGA enabled): 0x00000 - 0x9FFFF supports only WB (cacheable) access 0xA0000 - 0xBFFFF supports only UC (uncacheable) access 0xC0000 - 0xFFFFF supports only WB (cacheable) access pci_read_rom() indirectly uses ioremap(0xC0000) to read the shadow VGA option ROM. ioremap() used to default to a 16MB or 64MB UC kernel identity mapping, which would cause an MCA when reading 0xC0000 since only WB is supported there. X uses reads the option ROM to initialize devices. A smaller test case is: # echo 1 > /sys/bus/pci/devices/0000:aa:03.0/rom # cp /sys/bus/pci/devices/0000:aa:03.0/rom x To avoid this, we can use the same ioremap_page_range() strategy that most architectures use for all ioremaps. These page table mappings come out of the vmalloc area. On ia64, these are in region 5 (0xA... addresses) and typically use 16KB or 64KB mappings instead of 16MB or 64MB mappings. The smaller mappings give more flexibility to use the correct attributes. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64/pci/pci.c')
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