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authorDavid S. Miller <davem@davemloft.net>2008-10-29 21:25:00 -0700
committerDavid S. Miller <davem@davemloft.net>2008-12-04 09:16:46 -0800
commit64f2dde3f743c8a1ad8c0a1aa74166c1034afd92 (patch)
tree5033069de9784f6c2a6f545e5dfafa97a2b430d8 /arch/ia64
parentc9bb6003dd096ad190e1594a7d835ae1c39fae8f (diff)
sparc64: Run the kernel always in the TSO memory model.
The fact of the matter is, all UltraSPARC-III and later chips only implement TSO. They don't implement PSO and RMO memory models at all. Only the Ultra-I and Ultra-II family chips implement RMO and they are only helped marginally by using this setting when executing kernel code. The big plus to doing this is that we can eliminate all of the non-Sync memory barriers in the kernel except for the ones used in the optimized memcpy/memset code (these use block load and store operations which have their own memory ordering rules). Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/ia64')
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