diff options
author | Paul Mundt <lethal@linux-sh.org> | 2009-04-21 17:12:16 +0900 |
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committer | Paul Mundt <lethal@linux-sh.org> | 2009-04-21 17:12:16 +0900 |
commit | 4db25d496c09fdf094d52d11a90ae51f9ee473c6 (patch) | |
tree | 77ab8003db1d6ccbcf3a9acafad26002fba37b63 /arch/m32r/include/asm/cachectl.h | |
parent | b8c193f88ebd8705b3e916532539031cd9fc0b4c (diff) | |
parent | 8c31813f31cd4403b46802866949a95a6e8fa584 (diff) |
Merge branch 'sh/stable-updates' into sh/for-2.6.30
Diffstat (limited to 'arch/m32r/include/asm/cachectl.h')
-rw-r--r-- | arch/m32r/include/asm/cachectl.h | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/m32r/include/asm/cachectl.h b/arch/m32r/include/asm/cachectl.h new file mode 100644 index 00000000000..2aab8f6fff4 --- /dev/null +++ b/arch/m32r/include/asm/cachectl.h @@ -0,0 +1,26 @@ +/* + * cachectl.h -- defines for M32R cache control system calls + * + * Copyright (C) 2003 by Kazuhiro Inaoka + */ +#ifndef __ASM_M32R_CACHECTL +#define __ASM_M32R_CACHECTL + +/* + * Options for cacheflush system call + * + * cacheflush() is currently fluch_cache_all(). + */ +#define ICACHE (1<<0) /* flush instruction cache */ +#define DCACHE (1<<1) /* writeback and flush data cache */ +#define BCACHE (ICACHE|DCACHE) /* flush both caches */ + +/* + * Caching modes for the cachectl(2) call + * + * cachectl(2) is currently not supported and returns ENOSYS. + */ +#define CACHEABLE 0 /* make pages cacheable */ +#define UNCACHEABLE 1 /* make pages uncacheable */ + +#endif /* __ASM_M32R_CACHECTL */ |