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authorHirokazu Takata <takata@linux-m32r.org>2006-01-06 00:18:43 -0800
committerLinus Torvalds <torvalds@g5.osdl.org>2006-01-06 08:33:44 -0800
commit46ea178b7a5162405bf70954d769165cf2161309 (patch)
treed757c796068a38ffa8c2b793233805c9b0120cde /arch/m32r/kernel/io_mappi2.c
parent1b5b776aa5730cbda9cba84ba0f8ccd53a775797 (diff)
[PATCH] m32r: Update _port2addr to use NONCACHE_OFFSET
Modify _port2addr*() routines in arch/m32r/kernel/io_*.c to use NONCACHE_OFFSET instead of hard-coding of a constant address. This modification is also required to support an M3A-ZA36 FPGA eva board in case an MMU-less synthesizable m32r core is used. Signed-off-by: Hirokazu Takata <takata@linux-m32r.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/m32r/kernel/io_mappi2.c')
-rw-r--r--arch/m32r/kernel/io_mappi2.c24
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/m32r/kernel/io_mappi2.c b/arch/m32r/kernel/io_mappi2.c
index df3c729cb3e..e72d725606a 100644
--- a/arch/m32r/kernel/io_mappi2.c
+++ b/arch/m32r/kernel/io_mappi2.c
@@ -33,7 +33,7 @@ extern void pcc_iowrite_word(int, unsigned long, void *, size_t, size_t, int);
static inline void *_port2addr(unsigned long port)
{
- return (void *)(port | (NONCACHE_OFFSET));
+ return (void *)(port | NONCACHE_OFFSET);
}
#if defined(CONFIG_IDE) && !defined(CONFIG_M32R_CFC)
@@ -42,22 +42,22 @@ static inline void *__port2addr_ata(unsigned long port)
static int dummy_reg;
switch (port) {
- case 0x1f0: return (void *)0xac002000;
- case 0x1f1: return (void *)0xac012800;
- case 0x1f2: return (void *)0xac012002;
- case 0x1f3: return (void *)0xac012802;
- case 0x1f4: return (void *)0xac012004;
- case 0x1f5: return (void *)0xac012804;
- case 0x1f6: return (void *)0xac012006;
- case 0x1f7: return (void *)0xac012806;
- case 0x3f6: return (void *)0xac01200e;
+ case 0x1f0: return (void *)(0x0c002000 | NONCACHE_OFFSET);
+ case 0x1f1: return (void *)(0x0c012800 | NONCACHE_OFFSET);
+ case 0x1f2: return (void *)(0x0c012002 | NONCACHE_OFFSET);
+ case 0x1f3: return (void *)(0x0c012802 | NONCACHE_OFFSET);
+ case 0x1f4: return (void *)(0x0c012004 | NONCACHE_OFFSET);
+ case 0x1f5: return (void *)(0x0c012804 | NONCACHE_OFFSET);
+ case 0x1f6: return (void *)(0x0c012006 | NONCACHE_OFFSET);
+ case 0x1f7: return (void *)(0x0c012806 | NONCACHE_OFFSET);
+ case 0x3f6: return (void *)(0x0c01200e | NONCACHE_OFFSET);
default: return (void *)&dummy_reg;
}
}
#endif
-#define LAN_IOSTART 0xa0000300
-#define LAN_IOEND 0xa0000320
+#define LAN_IOSTART (0x300 | NONCACHE_OFFSET)
+#define LAN_IOEND (0x320 | NONCACHE_OFFSET)
#ifdef CONFIG_CHIP_OPSP
static inline void *_port2addr_ne(unsigned long port)
{