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authorJeff Garzik <jgarzik@pobox.com>2005-10-18 18:30:58 -0400
committerJeff Garzik <jgarzik@pobox.com>2005-10-18 18:30:58 -0400
commit77501f3cb648e18733509a951ed31eddd7ef2c0b (patch)
tree82624caa354394df2422562bf6dda56a2c088704 /arch/m32r/kernel
parent422fa08e538b649a9b80258950d2f8a202f45f19 (diff)
parent59a10b172fccaea793352c00fd9065f0a5b4ef70 (diff)
Merge branch 'upstream'
Diffstat (limited to 'arch/m32r/kernel')
-rw-r--r--arch/m32r/kernel/entry.S9
-rw-r--r--arch/m32r/kernel/smp.c12
-rw-r--r--arch/m32r/kernel/traps.c33
3 files changed, 33 insertions, 21 deletions
diff --git a/arch/m32r/kernel/entry.S b/arch/m32r/kernel/entry.S
index dddbf6b5ed2..85920fb8d08 100644
--- a/arch/m32r/kernel/entry.S
+++ b/arch/m32r/kernel/entry.S
@@ -681,6 +681,15 @@ ENTRY(debug_trap)
bl do_debug_trap
bra error_code
+ENTRY(ill_trap)
+ /* void ill_trap(void) */
+ SWITCH_TO_KERNEL_STACK
+ SAVE_ALL
+ ldi r1, #0 ; error_code ; FIXME
+ mv r0, sp ; pt_regs
+ bl do_ill_trap
+ bra error_code
+
/* Cache flushing handler */
ENTRY(cache_flushing_handler)
diff --git a/arch/m32r/kernel/smp.c b/arch/m32r/kernel/smp.c
index a4576ac7e87..8b1f6eb7687 100644
--- a/arch/m32r/kernel/smp.c
+++ b/arch/m32r/kernel/smp.c
@@ -275,12 +275,14 @@ static void flush_tlb_all_ipi(void *info)
*==========================================================================*/
void smp_flush_tlb_mm(struct mm_struct *mm)
{
- int cpu_id = smp_processor_id();
+ int cpu_id;
cpumask_t cpu_mask;
- unsigned long *mmc = &mm->context[cpu_id];
+ unsigned long *mmc;
unsigned long flags;
preempt_disable();
+ cpu_id = smp_processor_id();
+ mmc = &mm->context[cpu_id];
cpu_mask = mm->cpu_vm_mask;
cpu_clear(cpu_id, cpu_mask);
@@ -343,12 +345,14 @@ void smp_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
void smp_flush_tlb_page(struct vm_area_struct *vma, unsigned long va)
{
struct mm_struct *mm = vma->vm_mm;
- int cpu_id = smp_processor_id();
+ int cpu_id;
cpumask_t cpu_mask;
- unsigned long *mmc = &mm->context[cpu_id];
+ unsigned long *mmc;
unsigned long flags;
preempt_disable();
+ cpu_id = smp_processor_id();
+ mmc = &mm->context[cpu_id];
cpu_mask = mm->cpu_vm_mask;
cpu_clear(cpu_id, cpu_mask);
diff --git a/arch/m32r/kernel/traps.c b/arch/m32r/kernel/traps.c
index 01922271d17..5fe8ed6d62d 100644
--- a/arch/m32r/kernel/traps.c
+++ b/arch/m32r/kernel/traps.c
@@ -5,8 +5,6 @@
* Hitoshi Yamamoto
*/
-/* $Id$ */
-
/*
* 'traps.c' handles hardware traps and faults after we have saved some
* state in 'entry.S'.
@@ -35,6 +33,7 @@ asmlinkage void ei_handler(void);
asmlinkage void rie_handler(void);
asmlinkage void debug_trap(void);
asmlinkage void cache_flushing_handler(void);
+asmlinkage void ill_trap(void);
#ifdef CONFIG_SMP
extern void smp_reschedule_interrupt(void);
@@ -77,22 +76,22 @@ void set_eit_vector_entries(void)
eit_vector[5] = BRA_INSN(default_eit_handler, 5);
eit_vector[8] = BRA_INSN(rie_handler, 8);
eit_vector[12] = BRA_INSN(alignment_check, 12);
- eit_vector[16] = 0xff000000UL;
+ eit_vector[16] = BRA_INSN(ill_trap, 16);
eit_vector[17] = BRA_INSN(debug_trap, 17);
eit_vector[18] = BRA_INSN(system_call, 18);
- eit_vector[19] = 0xff000000UL;
- eit_vector[20] = 0xff000000UL;
- eit_vector[21] = 0xff000000UL;
- eit_vector[22] = 0xff000000UL;
- eit_vector[23] = 0xff000000UL;
- eit_vector[24] = 0xff000000UL;
- eit_vector[25] = 0xff000000UL;
- eit_vector[26] = 0xff000000UL;
- eit_vector[27] = 0xff000000UL;
+ eit_vector[19] = BRA_INSN(ill_trap, 19);
+ eit_vector[20] = BRA_INSN(ill_trap, 20);
+ eit_vector[21] = BRA_INSN(ill_trap, 21);
+ eit_vector[22] = BRA_INSN(ill_trap, 22);
+ eit_vector[23] = BRA_INSN(ill_trap, 23);
+ eit_vector[24] = BRA_INSN(ill_trap, 24);
+ eit_vector[25] = BRA_INSN(ill_trap, 25);
+ eit_vector[26] = BRA_INSN(ill_trap, 26);
+ eit_vector[27] = BRA_INSN(ill_trap, 27);
eit_vector[28] = BRA_INSN(cache_flushing_handler, 28);
- eit_vector[29] = 0xff000000UL;
- eit_vector[30] = 0xff000000UL;
- eit_vector[31] = 0xff000000UL;
+ eit_vector[29] = BRA_INSN(ill_trap, 29);
+ eit_vector[30] = BRA_INSN(ill_trap, 30);
+ eit_vector[31] = BRA_INSN(ill_trap, 31);
eit_vector[32] = BRA_INSN(ei_handler, 32);
eit_vector[64] = BRA_INSN(pie_handler, 64);
#ifdef CONFIG_MMU
@@ -286,7 +285,8 @@ asmlinkage void do_##name(struct pt_regs * regs, long error_code) \
DO_ERROR( 1, SIGTRAP, "debug trap", debug_trap)
DO_ERROR_INFO(0x20, SIGILL, "reserved instruction ", rie_handler, ILL_ILLOPC, regs->bpc)
-DO_ERROR_INFO(0x100, SIGILL, "privilege instruction", pie_handler, ILL_PRVOPC, regs->bpc)
+DO_ERROR_INFO(0x100, SIGILL, "privileged instruction", pie_handler, ILL_PRVOPC, regs->bpc)
+DO_ERROR_INFO(-1, SIGILL, "illegal trap", ill_trap, ILL_ILLTRP, regs->bpc)
extern int handle_unaligned_access(unsigned long, struct pt_regs *);
@@ -329,4 +329,3 @@ asmlinkage void do_alignment_check(struct pt_regs *regs, long error_code)
set_fs(oldfs);
}
}
-