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authorByungho Min <bhminjames@gmail.com>2009-06-23 21:39:56 +0900
committerBen Dooks <ben-linux@fluff.org>2009-08-16 23:25:00 +0100
commitc1cc3db8e9fcf1c9d2db3f34552c73996d3d8a13 (patch)
tree76f17bf026fb785fedf86b5ad69dfdf477f94719 /arch/m32r/lib
parentc9b870e7e796eea515a261a314917317ebb1cb4a (diff)
ARM: S5PC100: Clock and PLL support
S5PC100 has 4 PLLs (APLL,MPLL,EPLL,HPLL) and 3 clock domains. Clock scheme is implemented here. Signed-off-by: Byungho Min <bhmin@samsung.com> [ben-linux@fluff.org: edited title] Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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