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authorGreg Ungerer <gerg@uclinux.org>2009-01-13 10:17:30 +1000
committerGreg Ungerer <gerg@uclinux.org>2009-01-27 16:42:00 +1000
commita1a9bcb50308b6f7fa90038ef300f3725c130dde (patch)
treeb78b4c73b460d53eda984db32c7b838d9883f755 /arch/m68k/include/asm
parent26a4bc66a6f57299027e04d90b14fe56a44c6d2b (diff)
m68knommu: fix cache flushing for the 527x ColdFire processors
Fix cache flushing for the 527x ColdFire processors Its CACR register format is slightly different. Along with this add support for flushing the 523x cache, which uses the same format as the 527x ColdFire's, and was missing flush support. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/include/asm')
-rw-r--r--arch/m68k/include/asm/cacheflush_no.h11
1 files changed, 9 insertions, 2 deletions
diff --git a/arch/m68k/include/asm/cacheflush_no.h b/arch/m68k/include/asm/cacheflush_no.h
index 87e5dc0413b..c65f00a9455 100644
--- a/arch/m68k/include/asm/cacheflush_no.h
+++ b/arch/m68k/include/asm/cacheflush_no.h
@@ -51,13 +51,20 @@ static inline void __flush_cache_all(void)
"movec %%d0,%%CACR\n\t"
: : : "d0", "a0" );
#endif /* CONFIG_M5407 */
-#if defined(CONFIG_M527x) || defined(CONFIG_M528x)
+#if defined(CONFIG_M523x) || defined(CONFIG_M527x)
+ __asm__ __volatile__ (
+ "movel #0x81400100, %%d0\n\t"
+ "movec %%d0, %%CACR\n\t"
+ "nop\n\t"
+ : : : "d0" );
+#endif /* CONFIG_M523x || CONFIG_M527x */
+#if defined(CONFIG_M528x)
__asm__ __volatile__ (
"movel #0x81000200, %%d0\n\t"
"movec %%d0, %%CACR\n\t"
"nop\n\t"
: : : "d0" );
-#endif /* CONFIG_M527x || CONFIG_M528x */
+#endif /* CONFIG_M528x */
#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || defined(CONFIG_M5272)
__asm__ __volatile__ (
"movel #0x81000100, %%d0\n\t"