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authorThiemo Seufer <ths@networkno.de>2007-03-19 00:13:37 +0000
committerRalf Baechle <ralf@linux-mips.org>2007-03-19 20:22:43 +0000
commit119537c092638bf8a0672415024639353c773bb1 (patch)
treeaf3fc85f2d5a4bf93fd1cd82b228054ac6b5fe42 /arch/mips/ddb5xxx
parent72ede9b18967e7a8a62a88f164f003193f6d891f (diff)
[MIPS] Misc fixes for plat_irq_dispatch functions
o adds missing ST0_IM masks, which caused the logging of valid interrupts as spurious o stops pnx8550 to log every interrupt as spurious o adds cause register masks for ip22/ip32, which caused handling of masked interrupts o removes some superfluous parentheses in the SNI interrupt code Signed-Off-By: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/ddb5xxx')
-rw-r--r--arch/mips/ddb5xxx/ddb5477/irq.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/ddb5xxx/ddb5477/irq.c b/arch/mips/ddb5xxx/ddb5477/irq.c
index 2b23234a5b9..faa4a506bf8 100644
--- a/arch/mips/ddb5xxx/ddb5477/irq.c
+++ b/arch/mips/ddb5xxx/ddb5477/irq.c
@@ -194,7 +194,7 @@ static void vrc5477_irq_dispatch(void)
asmlinkage void plat_irq_dispatch(void)
{
- unsigned int pending = read_c0_cause() & read_c0_status();
+ unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
if (pending & STATUSF_IP7)
do_IRQ(CPU_IRQ_BASE + 7);