diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-10-15 23:16:07 +0100 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-10-15 23:16:07 +0100 |
commit | 2502991560dc8244dbe10e48473d85722c1e2ec1 (patch) | |
tree | 63b1f3be2ed56ff06f1e8db709e4ce85d69c3add /arch/mips/include/asm/tlb.h | |
parent | 7e69a8c4d06b7ecb874f571e82b715a9f79bc3c4 (diff) | |
parent | a9ff8f6462635c8d9f8d64b7b10ddcea8404d77b (diff) |
Merge branch 'fixes' into for-linus
Conflicts:
arch/arm/mach-versatile/core.c
Diffstat (limited to 'arch/mips/include/asm/tlb.h')
-rw-r--r-- | arch/mips/include/asm/tlb.h | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/mips/include/asm/tlb.h b/arch/mips/include/asm/tlb.h new file mode 100644 index 00000000000..80d9dfcf1e8 --- /dev/null +++ b/arch/mips/include/asm/tlb.h @@ -0,0 +1,23 @@ +#ifndef __ASM_TLB_H +#define __ASM_TLB_H + +/* + * MIPS doesn't need any special per-pte or per-vma handling, except + * we need to flush cache for area to be unmapped. + */ +#define tlb_start_vma(tlb, vma) \ + do { \ + if (!tlb->fullmm) \ + flush_cache_range(vma, vma->vm_start, vma->vm_end); \ + } while (0) +#define tlb_end_vma(tlb, vma) do { } while (0) +#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0) + +/* + * .. because we flush the whole mm when it fills up. + */ +#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm) + +#include <asm-generic/tlb.h> + +#endif /* __ASM_TLB_H */ |