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authorDavid Daney <ddaney@caviumnetworks.com>2008-12-11 15:33:31 -0800
committerRalf Baechle <ralf@linux-mips.org>2009-01-11 09:57:23 +0000
commitbabed555695fad25820fb5fb0b5068c56e375900 (patch)
treeaaee9f2ee2700f81b2d156289bec91312ab34ea2 /arch/mips/include
parentb5e00af81f298f4ba2e41325042a7ce1ec022b1d (diff)
MIPS: Add Cavium OCTEON specific registers to ptrace.h and asm-offsets.c
Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include')
-rw-r--r--arch/mips/include/asm/ptrace.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/mips/include/asm/ptrace.h b/arch/mips/include/asm/ptrace.h
index c2c8bac4330..1f30d16d466 100644
--- a/arch/mips/include/asm/ptrace.h
+++ b/arch/mips/include/asm/ptrace.h
@@ -48,6 +48,10 @@ struct pt_regs {
#ifdef CONFIG_MIPS_MT_SMTC
unsigned long cp0_tcstatus;
#endif /* CONFIG_MIPS_MT_SMTC */
+#ifdef CONFIG_CPU_CAVIUM_OCTEON
+ unsigned long long mpl[3]; /* MTM{0,1,2} */
+ unsigned long long mtp[3]; /* MTP{0,1,2} */
+#endif
} __attribute__ ((aligned (8)));
/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */