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authorThiemo Seufer <ths@networkno.de>2004-12-08 10:32:45 +0000
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 19:30:15 +0100
commit69903d6500c73af8329a5fba7153b0d50748981c (patch)
treed77624da0c4f7fab47e3ea5ab51e8a45b89d2909 /arch/mips/kernel/genex.S
parentb59a9504cb93db7fae31e60760725d48652a1fc3 (diff)
Fix typos and formatting.
Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/genex.S')
-rw-r--r--arch/mips/kernel/genex.S10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index e7f6c1b9080..e5021c758ef 100644
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -82,7 +82,7 @@ NESTED(except_vec3_r4000, 0, sp)
li k0, 14<<2
beq k1, k0, handle_vcei
#ifdef CONFIG_64BIT
- dsll k1, k1, 1
+ dsll k1, k1, 1
#endif
.set pop
PTR_L k0, exception_handlers(k1)
@@ -90,17 +90,17 @@ NESTED(except_vec3_r4000, 0, sp)
/*
* Big shit, we now may have two dirty primary cache lines for the same
- * physical address. We can savely invalidate the line pointed to by
+ * physical address. We can safely invalidate the line pointed to by
* c0_badvaddr because after return from this exception handler the
* load / store will be re-executed.
*/
handle_vced:
- DMFC0 k0, CP0_BADVADDR
+ MFC0 k0, CP0_BADVADDR
li k1, -4 # Is this ...
and k0, k1 # ... really needed?
mtc0 zero, CP0_TAGLO
- cache Index_Store_Tag_D,(k0)
- cache Hit_Writeback_Inv_SD,(k0)
+ cache Index_Store_Tag_D, (k0)
+ cache Hit_Writeback_Inv_SD, (k0)
#ifdef CONFIG_PROC_FS
PTR_LA k0, vced_count
lw k1, (k0)