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| author | Kumar Gala <galak@kernel.crashing.org> | 2008-01-28 13:23:42 -0600 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2008-01-28 13:23:42 -0600 |
| commit | a6f71745969d495d697d1ccd96385d2f7a963375 (patch) | |
| tree | 959cb508e73e4b1757a1fdb8378c28a798564433 /arch/mips/kernel/r4k_fpu.S | |
| parent | 3b29daded680733a37ed6618e165e86df45d89ab (diff) | |
[POWERPC] 85xx: Only invalidate TLB0 and TLB1
All current 85xx/e500 implementations only have two TLB
arrays. We are wasting cycles by invalidating TLB2 and TLB3.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/mips/kernel/r4k_fpu.S')
0 files changed, 0 insertions, 0 deletions