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authorRalf Baechle <ralf@linux-mips.org>2007-08-06 14:02:12 +0100
committerRalf Baechle <ralf@linux-mips.org>2007-08-27 02:16:54 +0100
commit428ab280a0754656fa09304017b0ce626744cc77 (patch)
tree90b3973d6451701399c66ea252852bb7d34762a9 /arch/mips/kernel
parentd98cc84dd11c126f85675dab8e2aebcbee114a90 (diff)
[MIPS] SMP: Scatter __cpuinit over the code as needed.
MIPS doesn't do CPU hotplugging yet but since many of the functions don't even have an __init let's fix this right. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r--arch/mips/kernel/smp-mt.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c
index 19b30d6f172..05dcce41632 100644
--- a/arch/mips/kernel/smp-mt.c
+++ b/arch/mips/kernel/smp-mt.c
@@ -287,7 +287,7 @@ void __init plat_prepare_cpus(unsigned int max_cpus)
* (unsigned long)idle->thread_info the gp
* assumes a 1:1 mapping of TC => VPE
*/
-void prom_boot_secondary(int cpu, struct task_struct *idle)
+void __cpuinit prom_boot_secondary(int cpu, struct task_struct *idle)
{
struct thread_info *gp = task_thread_info(idle);
dvpe();
@@ -321,7 +321,7 @@ void prom_boot_secondary(int cpu, struct task_struct *idle)
evpe(EVPE_ENABLE);
}
-void prom_init_secondary(void)
+void __cpuinit prom_init_secondary(void)
{
/* Enable per-cpu interrupts */
@@ -330,7 +330,7 @@ void prom_init_secondary(void)
(STATUSF_IP0 | STATUSF_IP1 | STATUSF_IP6 | STATUSF_IP7));
}
-void prom_smp_finish(void)
+void __cpuinit prom_smp_finish(void)
{
write_c0_compare(read_c0_count() + (8* mips_hpt_frequency/HZ));