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author | Linus Torvalds <torvalds@woody.osdl.org> | 2006-12-01 16:44:02 -0800 |
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committer | Linus Torvalds <torvalds@woody.osdl.org> | 2006-12-01 16:44:02 -0800 |
commit | c3e59d1e891f6140a346de2b8547e25133c716b0 (patch) | |
tree | b2a669f625009a3a33f20f648bd654637323d296 /arch/mips/mips-boards/sim/sim_time.c | |
parent | b07e3c3a1db0ce399d2a1d04860e1b901927c05e (diff) | |
parent | aa414dff4f7bef29457592414551becdca72dd6b (diff) |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (31 commits)
[MIPS] Remove duplicate ISA DMA code for 0 DMA channel case.
[MIPS] Remove unused definition of cpu_to_lelongp()
[MIPS] Remove userspace proofing from <asm/bitops.h>.
[MIPS] Remove old junk left from old atomic_lock.
[MIPS] Use conditional traps for BUG_ON on MIPS II and better.
[MIPS] mips HPT cleanup: make clocksource_mips public
[MIPS] do_IRQ cleanup
[MIPS] Avoid dupliate D-cache flush on R400C / R4400 SC and MC variants.
[MIPS] Remove redundant r4k_blast_icache() calls
[MIPS] Work around bogus gcc warnings.
[MIPS] Fix double inclusions
[MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irq
[MIPS] IRQ cleanups
[MIPS] mips hpt cleanup: get rid of mips_hpt_init
[MIPS] PB1200: Remove duplicate definitions
[MIPS] Fix alignment hole in struct cache_desc; shrink struct.
[MIPS] Oprofile: kernel support for the R10000.
[MIPS] Remove unused R10000 performance counter definitions.
[MIPS] Add support for kexec
[MIPS] Don't print presence of WAIT instruction on bootup.
...
Diffstat (limited to 'arch/mips/mips-boards/sim/sim_time.c')
-rw-r--r-- | arch/mips/mips-boards/sim/sim_time.c | 18 |
1 files changed, 6 insertions, 12 deletions
diff --git a/arch/mips/mips-boards/sim/sim_time.c b/arch/mips/mips-boards/sim/sim_time.c index 24a4ed00cc0..30711d016fe 100644 --- a/arch/mips/mips-boards/sim/sim_time.c +++ b/arch/mips/mips-boards/sim/sim_time.c @@ -3,31 +3,24 @@ #include <linux/kernel_stat.h> #include <linux/sched.h> #include <linux/spinlock.h> - -#include <asm/mipsregs.h> -#include <asm/ptrace.h> -#include <asm/hardirq.h> -#include <asm/div64.h> -#include <asm/cpu.h> -#include <asm/time.h> - #include <linux/interrupt.h> #include <linux/mc146818rtc.h> #include <linux/timex.h> + #include <asm/mipsregs.h> +#include <asm/ptrace.h> #include <asm/hardirq.h> -#include <asm/irq.h> #include <asm/div64.h> #include <asm/cpu.h> #include <asm/time.h> +#include <asm/irq.h> #include <asm/mc146818-time.h> #include <asm/msc01_ic.h> +#include <asm/smp.h> #include <asm/mips-boards/generic.h> #include <asm/mips-boards/prom.h> #include <asm/mips-boards/simint.h> -#include <asm/mc146818-time.h> -#include <asm/smp.h> unsigned long cpu_khz; @@ -203,7 +196,8 @@ void __init plat_timer_setup(struct irqaction *irq) on seperate cpu's the first one tries to handle the second interrupt. The effect is that the int remains disabled on the second cpu. Mark the interrupt with IRQ_PER_CPU to avoid any confusion */ - irq_desc[mips_cpu_timer_irq].status |= IRQ_PER_CPU; + irq_desc[mips_cpu_timer_irq].flags |= IRQ_PER_CPU; + set_irq_handler(mips_cpu_timer_irq, handle_percpu_irq); #endif /* to generate the first timer interrupt */ |