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authorLinus Torvalds <torvalds@linux-foundation.org>2009-03-30 10:36:35 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2009-03-30 10:36:35 -0700
commit915db32ddbc967f023fbf7d7f01cca9e05606a9b (patch)
tree1634540805af363e1514d132d9140aa585f9cc9d /arch/mips/mm/tlbex.c
parentebc8eca169be0283d5a7ab54c4411dd59cfb0f27 (diff)
parent91e8a30e90144bcd0fead02dc57976f304c3b3f7 (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (21 commits) MIPS: Alchemy: PB1200: use SMC91X platform data. MIPS: Alchemy: MIPS hazard workarounds are not required. MIPS: Alchemy: provide cpu feature overrides. MIPS: Alchemy: unify CPU model constants. MIPS: Make a needlessly global symbol static in arch/mips/kernel/smp.c MIPS: Fix global namespace pollution in arch/mips/kernel/smp-up.c MIPS: Malta: make a needlessly global integer variable static MIPS: Use BUG_ON() where possible. MIPS: Convert obsolete irq_desc_t to struct irq_desc MIPS: Enable GENERIC_HARDIRQS_NO__DO_IRQ for all platforms MIPS: EMMA2RH: Set UART mapbase MIPS: EMMA2RH: Use set_irq_chip_and_handler_name MIPS: EMMA2RH: Use handle_edge_irq() handler for GPIO interrupts MIPS: Mark Eins: Fix cascading interrupt dispatcher MIPS: Au1000: convert to using gpiolib MIPS: Stop using <asm-generic/int-l64.h>. MIPS: Cavium: Add -Werror MIPS: Makefile: Add simple make install target. MIPS: Compat: Zero upper 32-bit of offset_high and offset_low. MIPS: __raw_spin_lock() may spin forever on ticket wrap. ...
Diffstat (limited to 'arch/mips/mm/tlbex.c')
-rw-r--r--arch/mips/mm/tlbex.c8
1 files changed, 1 insertions, 7 deletions
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index f335cf6cdd7..0615b62efd6 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -292,13 +292,6 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l,
case CPU_R4300:
case CPU_5KC:
case CPU_TX49XX:
- case CPU_AU1000:
- case CPU_AU1100:
- case CPU_AU1500:
- case CPU_AU1550:
- case CPU_AU1200:
- case CPU_AU1210:
- case CPU_AU1250:
case CPU_PR4450:
uasm_i_nop(p);
tlbw(p);
@@ -321,6 +314,7 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l,
case CPU_R5500:
if (m4kc_tlbp_war())
uasm_i_nop(p);
+ case CPU_ALCHEMY:
tlbw(p);
break;