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authorRalf Baechle <ralf@linux-mips.org>2005-02-04 15:19:01 +0000
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 19:30:25 +0100
commit28ecca4786bd8af209ae65689faa6aeea80adba2 (patch)
tree9a74856c8a4fcdf4568e81952e6ae0af2256a75c /arch/mips/mm
parentea7c394492cb56ff0c10ad327157f237d5bbe6b4 (diff)
Remove old wrong bits of cache code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm')
-rw-r--r--arch/mips/mm/c-r4k.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 5ea84bc98c6..c08fa366b18 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -1212,9 +1212,6 @@ void __init ld_mmu_r4xx0(void)
probe_pcache();
setup_scache();
- if (c->dcache.sets * c->dcache.ways > PAGE_SIZE)
- c->dcache.flags |= MIPS_CACHE_ALIASES;
-
r4k_blast_dcache_page_setup();
r4k_blast_dcache_page_indexed_setup();
r4k_blast_dcache_setup();