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| author | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2006-03-21 13:05:45 -0600 |
|---|---|---|
| committer | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2006-03-21 13:05:45 -0600 |
| commit | d04cdb64212eb5ae6a98026a97dda626e40e8e9a (patch) | |
| tree | b6a7dbb21ccfceb915844e9a330b3d3dfcaf3c5b /arch/mips/pci/pci-ip27.c | |
| parent | 2f8600dff2b140096a7df781884e918a16aa90e0 (diff) | |
| parent | ec1248e70edc5cf7b485efcc7b41e44e10f422e5 (diff) | |
Merge ../linux-2.6
Diffstat (limited to 'arch/mips/pci/pci-ip27.c')
| -rw-r--r-- | arch/mips/pci/pci-ip27.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/mips/pci/pci-ip27.c b/arch/mips/pci/pci-ip27.c index efc96ce99ee..6002d2a6a26 100644 --- a/arch/mips/pci/pci-ip27.c +++ b/arch/mips/pci/pci-ip27.c @@ -379,18 +379,18 @@ int __init bridge_probe(nasid_t nasid, int widget_id, int masterwid) bridge = (bridge_t *) RAW_NODE_SWIN_BASE(nasid, widget_id); /* - * Clear all pending interrupts. - */ + * Clear all pending interrupts. + */ bridge->b_int_rst_stat = BRIDGE_IRR_ALL_CLR; /* - * Until otherwise set up, assume all interrupts are from slot 0 - */ + * Until otherwise set up, assume all interrupts are from slot 0 + */ bridge->b_int_device = 0x0; /* - * swap pio's to pci mem and io space (big windows) - */ + * swap pio's to pci mem and io space (big windows) + */ bridge->b_wid_control |= BRIDGE_CTRL_IO_SWAP | BRIDGE_CTRL_MEM_SWAP; |