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authorRalf Baechle <ralf@linux-mips.org>2006-03-11 08:18:41 +0000
committerRalf Baechle <ralf@linux-mips.org>2006-03-21 13:27:47 +0000
commita3dddd560ee936495466d85ecc97490d171e8d31 (patch)
treee9b5d778b5249ce348d2285a9b886b83c510d813 /arch/mips/pci
parent59b3e8e9aac69d2d02853acac7e2affdfbabca50 (diff)
[MIPS] War on whitespace: cleanup initial spaces followed by tabs.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pci')
-rw-r--r--arch/mips/pci/fixup-vr4133.c2
-rw-r--r--arch/mips/pci/ops-ddb5477.c4
-rw-r--r--arch/mips/pci/ops-tx4938.c16
-rw-r--r--arch/mips/pci/pci-bcm1480.c2
-rw-r--r--arch/mips/pci/pci-bcm1480ht.c2
-rw-r--r--arch/mips/pci/pci-ip27.c12
6 files changed, 19 insertions, 19 deletions
diff --git a/arch/mips/pci/fixup-vr4133.c b/arch/mips/pci/fixup-vr4133.c
index 03a0ff2fc99..a8a47b494b2 100644
--- a/arch/mips/pci/fixup-vr4133.c
+++ b/arch/mips/pci/fixup-vr4133.c
@@ -45,7 +45,7 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
/*
* we have to open the bridges' windows down to 0 because otherwise
- * we cannot access ISA south bridge I/O registers that get mapped from
+ * we cannot access ISA south bridge I/O registers that get mapped from
* 0. for example, 8259 PIC would be unaccessible without that
*/
if(dev->vendor == PCI_VENDOR_ID_INTEL && dev->device == PCI_DEVICE_ID_INTEL_S21152BB) {
diff --git a/arch/mips/pci/ops-ddb5477.c b/arch/mips/pci/ops-ddb5477.c
index 0406b50a37d..8e57d4c5d90 100644
--- a/arch/mips/pci/ops-ddb5477.c
+++ b/arch/mips/pci/ops-ddb5477.c
@@ -253,9 +253,9 @@ static int write_config_byte(struct pci_config_swap *swap,
static int prefix##_##rw##_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 star val) \
{ \
if (size == 1) \
- return rw##_config_byte(pciswap, bus, devfn, where, (u8 star)val); \
+ return rw##_config_byte(pciswap, bus, devfn, where, (u8 star)val); \
else if (size == 2) \
- return rw##_config_word(pciswap, bus, devfn, where, (u16 star)val); \
+ return rw##_config_word(pciswap, bus, devfn, where, (u16 star)val); \
/* Size must be 4 */ \
return rw##_config_dword(pciswap, bus, devfn, where, val); \
}
diff --git a/arch/mips/pci/ops-tx4938.c b/arch/mips/pci/ops-tx4938.c
index 4c0dcfce529..0ff083489ef 100644
--- a/arch/mips/pci/ops-tx4938.c
+++ b/arch/mips/pci/ops-tx4938.c
@@ -34,16 +34,16 @@ struct resource pci_mem_resource = {
};
struct resource tx4938_pcic1_pci_io_resource = {
- .name = "PCI1 IO",
- .start = 0,
- .end = 0,
- .flags = IORESOURCE_IO
+ .name = "PCI1 IO",
+ .start = 0,
+ .end = 0,
+ .flags = IORESOURCE_IO
};
struct resource tx4938_pcic1_pci_mem_resource = {
- .name = "PCI1 mem",
- .start = 0,
- .end = 0,
- .flags = IORESOURCE_MEM
+ .name = "PCI1 mem",
+ .start = 0,
+ .end = 0,
+ .flags = IORESOURCE_MEM
};
static int mkaddr(int bus, int dev_fn, int where, int *flagsp)
diff --git a/arch/mips/pci/pci-bcm1480.c b/arch/mips/pci/pci-bcm1480.c
index ca975e7d32f..f4ef1a35ca1 100644
--- a/arch/mips/pci/pci-bcm1480.c
+++ b/arch/mips/pci/pci-bcm1480.c
@@ -100,7 +100,7 @@ static int bcm1480_pci_can_access(struct pci_bus *bus, int devfn)
if (bus->number == 0) {
devno = PCI_SLOT(devfn);
- if (bcm1480_bus_status & PCI_DEVICE_MODE)
+ if (bcm1480_bus_status & PCI_DEVICE_MODE)
return 0;
else
return 1;
diff --git a/arch/mips/pci/pci-bcm1480ht.c b/arch/mips/pci/pci-bcm1480ht.c
index aca4a2e7a1c..a3eebe5890a 100644
--- a/arch/mips/pci/pci-bcm1480ht.c
+++ b/arch/mips/pci/pci-bcm1480ht.c
@@ -95,7 +95,7 @@ static int bcm1480ht_can_access(struct pci_bus *bus, int devfn)
if (bus->number == 0) {
devno = PCI_SLOT(devfn);
- if (bcm1480ht_bus_status & PCI_DEVICE_MODE)
+ if (bcm1480ht_bus_status & PCI_DEVICE_MODE)
return 0;
}
return 1;
diff --git a/arch/mips/pci/pci-ip27.c b/arch/mips/pci/pci-ip27.c
index efc96ce99ee..6002d2a6a26 100644
--- a/arch/mips/pci/pci-ip27.c
+++ b/arch/mips/pci/pci-ip27.c
@@ -379,18 +379,18 @@ int __init bridge_probe(nasid_t nasid, int widget_id, int masterwid)
bridge = (bridge_t *) RAW_NODE_SWIN_BASE(nasid, widget_id);
/*
- * Clear all pending interrupts.
- */
+ * Clear all pending interrupts.
+ */
bridge->b_int_rst_stat = BRIDGE_IRR_ALL_CLR;
/*
- * Until otherwise set up, assume all interrupts are from slot 0
- */
+ * Until otherwise set up, assume all interrupts are from slot 0
+ */
bridge->b_int_device = 0x0;
/*
- * swap pio's to pci mem and io space (big windows)
- */
+ * swap pio's to pci mem and io space (big windows)
+ */
bridge->b_wid_control |= BRIDGE_CTRL_IO_SWAP |
BRIDGE_CTRL_MEM_SWAP;