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authorJames Bottomley <jejb@mulgrave.il.steeleye.com>2006-03-21 13:05:45 -0600
committerJames Bottomley <jejb@mulgrave.il.steeleye.com>2006-03-21 13:05:45 -0600
commitd04cdb64212eb5ae6a98026a97dda626e40e8e9a (patch)
treeb6a7dbb21ccfceb915844e9a330b3d3dfcaf3c5b /arch/mips/philips/pnx8550/common/int.c
parent2f8600dff2b140096a7df781884e918a16aa90e0 (diff)
parentec1248e70edc5cf7b485efcc7b41e44e10f422e5 (diff)
Merge ../linux-2.6
Diffstat (limited to 'arch/mips/philips/pnx8550/common/int.c')
-rw-r--r--arch/mips/philips/pnx8550/common/int.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/philips/pnx8550/common/int.c b/arch/mips/philips/pnx8550/common/int.c
index 546144988bf..c500e2d41f2 100644
--- a/arch/mips/philips/pnx8550/common/int.c
+++ b/arch/mips/philips/pnx8550/common/int.c
@@ -251,7 +251,7 @@ void __init arch_init_irq(void)
if (gic_int_line == (PNX8550_INT_GPIO0 - PNX8550_INT_GIC_MIN)) {
/* PCI INT through gpio 8, which is setup in
* pnx8550_setup.c and routed to GPIO
- * Interrupt Level 0 (GPIO Connection 58).
+ * Interrupt Level 0 (GPIO Connection 58).
* Set it active low. */
PNX8550_GIC_REQ(gic_int_line) = 0x1E020000;