diff options
| author | Thiemo Seufer <ths@networkno.de> | 2007-03-19 00:13:37 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-03-19 20:22:43 +0000 |
| commit | 119537c092638bf8a0672415024639353c773bb1 (patch) | |
| tree | af3fc85f2d5a4bf93fd1cd82b228054ac6b5fe42 /arch/mips/sibyte | |
| parent | 72ede9b18967e7a8a62a88f164f003193f6d891f (diff) | |
[MIPS] Misc fixes for plat_irq_dispatch functions
o adds missing ST0_IM masks, which caused the logging of valid interrupts
as spurious
o stops pnx8550 to log every interrupt as spurious
o adds cause register masks for ip22/ip32, which caused handling of masked
interrupts
o removes some superfluous parentheses in the SNI interrupt code
Signed-Off-By: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/sibyte')
| -rw-r--r-- | arch/mips/sibyte/sb1250/irq.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c index 148239446e6..0e6a13c0bd0 100644 --- a/arch/mips/sibyte/sb1250/irq.c +++ b/arch/mips/sibyte/sb1250/irq.c @@ -421,7 +421,7 @@ asmlinkage void plat_irq_dispatch(void) * blasting the high 32 bits. */ - pending = read_c0_cause() & read_c0_status(); + pending = read_c0_cause() & read_c0_status() & ST0_IM; #ifdef CONFIG_SIBYTE_SB1250_PROF if (pending & CAUSEF_IP7) /* Cpu performance counter interrupt */ |