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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2006-08-20 22:55:52 +0900
committerRalf Baechle <ralf@linux-mips.org>2006-10-09 23:20:48 +0100
commitf5c70dd7f384db4c524c35288d9be3ed61ac41a9 (patch)
tree1307e583bbbfa067422dc803f4de775a9c9bfb25 /arch/mips/tx4927
parent5536b2351425136e629bd9fc18135c6e21e125c2 (diff)
[MIPS] Fix build errors related to wbflush.h on tx4927/tx4938.
TX49 CPUs have a SYNC instruction so that CONFIG_CPU_HAS_WB is no longer needed. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/tx4927')
-rw-r--r--arch/mips/tx4927/common/tx4927_setup.c10
-rw-r--r--arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c1
2 files changed, 1 insertions, 10 deletions
diff --git a/arch/mips/tx4927/common/tx4927_setup.c b/arch/mips/tx4927/common/tx4927_setup.c
index 3ace4037343..4658b2ae483 100644
--- a/arch/mips/tx4927/common/tx4927_setup.c
+++ b/arch/mips/tx4927/common/tx4927_setup.c
@@ -53,19 +53,9 @@ void __init tx4927_time_init(void);
void dump_cp0(char *key);
-void (*__wbflush) (void);
-
-static void tx4927_write_buffer_flush(void)
-{
- __asm__ __volatile__
- ("sync\n\t" "nop\n\t" "loop: bc0f loop\n\t" "nop\n\t");
-}
-
-
void __init plat_mem_setup(void)
{
board_time_init = tx4927_time_init;
- __wbflush = tx4927_write_buffer_flush;
#ifdef CONFIG_TOSHIBA_RBTX4927
{
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
index 3e24413d4c0..0c3c3f66823 100644
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
+++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
@@ -129,6 +129,7 @@ JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthB
#include <asm/processor.h>
#include <asm/reboot.h>
#include <asm/time.h>
+#include <asm/wbflush.h>
#include <linux/bootmem.h>
#include <linux/blkdev.h>
#ifdef CONFIG_RTC_DS1742