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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2008-08-19 22:55:05 +0900
committerRalf Baechle <ralf@linux-mips.org>2008-10-11 16:18:41 +0100
commitf96a3383cfede841cdf80a5927f14478981ed78c (patch)
tree8d6da93bbf355c2f95a2591d116b18b8b6e42b1f /arch/mips/txx9/rbtx4927/irq.c
parent9fa32c6b0275ab1e8b19f74fbfa3ed8411345db6 (diff)
MIPS: RBTX4927: More explicit initialization
* Make sure all interrupts cleared on startup * Initialize some GPIOs Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/txx9/rbtx4927/irq.c')
-rw-r--r--arch/mips/txx9/rbtx4927/irq.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/mips/txx9/rbtx4927/irq.c b/arch/mips/txx9/rbtx4927/irq.c
index 00cd5231da3..22076e3f03a 100644
--- a/arch/mips/txx9/rbtx4927/irq.c
+++ b/arch/mips/txx9/rbtx4927/irq.c
@@ -142,6 +142,11 @@ static void __init toshiba_rbtx4927_irq_ioc_init(void)
{
int i;
+ /* mask all IOC interrupts */
+ writeb(0, rbtx4927_imask_addr);
+ /* clear SoftInt interrupts */
+ writeb(0, rbtx4927_softint_addr);
+
for (i = RBTX4927_IRQ_IOC;
i < RBTX4927_IRQ_IOC + RBTX4927_NR_IRQ_IOC; i++)
set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type,