diff options
| author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2008-09-01 22:22:37 +0900 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2008-10-11 16:18:47 +0100 |
| commit | 21e77df215e58523a755b5dd006cb17610616f20 (patch) | |
| tree | 94895b0fdc98e5f6ac44ba667feb96a9433a7065 /arch/mips/txx9/rbtx4938 | |
| parent | f6d9831bb11eb465f95fb1736b866d405d9c7cbf (diff) | |
MIPS: TXx9: Microoptimize interrupt handlers
The IOC interrupt status register on RBTX49XX only have 8 bits. Use
8-bit version of __fls() to optimize interrupt handlers.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/txx9/rbtx4938')
| -rw-r--r-- | arch/mips/txx9/rbtx4938/irq.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/mips/txx9/rbtx4938/irq.c b/arch/mips/txx9/rbtx4938/irq.c index ca2f8306ce9..7d21befb893 100644 --- a/arch/mips/txx9/rbtx4938/irq.c +++ b/arch/mips/txx9/rbtx4938/irq.c @@ -85,10 +85,10 @@ static int toshiba_rbtx4938_irq_nested(int sw_irq) u8 level3; level3 = readb(rbtx4938_imstat_addr); - if (level3) - /* must use fls so onboard ATA has priority */ - sw_irq = RBTX4938_IRQ_IOC + fls(level3) - 1; - return sw_irq; + if (unlikely(!level3)) + return -1; + /* must use fls so onboard ATA has priority */ + return RBTX4938_IRQ_IOC + __fls8(level3); } static void __init |