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authorKumar Gala <galak@kernel.crashing.org>2009-03-31 08:46:25 -0500
committerKumar Gala <galak@kernel.crashing.org>2009-03-31 08:46:25 -0500
commitfe671772ab1bf5624f2c4dbe2295e6ebeb8055fc (patch)
tree281b703232b95c2009468f5c4975e97a2f7384c5 /arch/powerpc/boot/dts/sbc8548.dts
parent9310933c832719b095f82dab30c6bf4e75e937ee (diff)
powerpc/85xx: Use fsl,mpc85.. as prefix for memory ctrl & l2-cache nodes
Older devices tree's used "fsl,85.." instead of the preferred "fsl,mpc85.." for the memory controller & l2 cache controller nodes. The EDAC code is the only use of these and has been updated for some time to support both "fsl,85.." and "fsl,mpc85.." Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/sbc8548.dts')
-rw-r--r--arch/powerpc/boot/dts/sbc8548.dts4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/boot/dts/sbc8548.dts b/arch/powerpc/boot/dts/sbc8548.dts
index 9c5079fec4f..b1f1416ac99 100644
--- a/arch/powerpc/boot/dts/sbc8548.dts
+++ b/arch/powerpc/boot/dts/sbc8548.dts
@@ -156,14 +156,14 @@
compatible = "simple-bus";
memory-controller@2000 {
- compatible = "fsl,8548-memory-controller";
+ compatible = "fsl,mpc8548-memory-controller";
reg = <0x2000 0x1000>;
interrupt-parent = <&mpic>;
interrupts = <0x12 0x2>;
};
L2: l2-cache-controller@20000 {
- compatible = "fsl,8548-l2-cache-controller";
+ compatible = "fsl,mpc8548-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <0x20>; // 32 bytes
cache-size = <0x80000>; // L2, 512K