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authorLinus Torvalds <torvalds@linux-foundation.org>2008-04-25 12:52:16 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2008-04-25 12:52:16 -0700
commitb9fa38f75ea7e1f64bc29653ca9758303ce698e4 (patch)
tree6f6c0232ccbd9c27c923cf5cdcb0a3948e061aa9 /arch/powerpc/kernel/cpu_setup_6xx.S
parent6e18933f2b6156d0a0ec9d5522ab6a6033cf7241 (diff)
parentf360bf0015e5b3e82be61c68e0863b3f98852ee2 (diff)
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (49 commits) [POWERPC] Add zImage.iseries to arch/powerpc/boot/.gitignore [POWERPC] bootwrapper: fix build error on virtex405-head.S [POWERPC] 4xx: Fix 460GT support to not enable FPU [POWERPC] 4xx: Add NOR FLASH entries to Canyonlands and Glacier dts [POWERPC] Xilinx: of_serial support for Xilinx uart 16550. [POWERPC] Xilinx: boot support for Xilinx uart 16550. [POWERPC] celleb: Add support for PCI Express [POWERPC] celleb: Move miscellaneous files for Beat [POWERPC] celleb: Move a file for SPU on Beat [POWERPC] celleb: Move files for Beat mmu and iommu [POWERPC] celleb: Move files for Beat hvcall interfaces [POWERPC] celleb: Move the SCC related code for celleb [POWERPC] celleb: Move the files for celleb base support [POWERPC] celleb: Consolidate io-workarounds code [POWERPC] cell: Generalize io-workarounds code [POWERPC] Add CONFIG_PPC_PSERIES_DEBUG to enable debugging for platforms/pseries [POWERPC] Convert from DBG() to pr_debug() in platforms/pseries/ [POWERPC] Register udbg console early on pseries LPAR [POWERPC] Mark udbg console as CON_ANYTIME, ie. callable early in boot [POWERPC] Set udbg_console index to 0 ...
Diffstat (limited to 'arch/powerpc/kernel/cpu_setup_6xx.S')
-rw-r--r--arch/powerpc/kernel/cpu_setup_6xx.S8
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/powerpc/kernel/cpu_setup_6xx.S b/arch/powerpc/kernel/cpu_setup_6xx.S
index f1ee0b3f78f..72d1d739525 100644
--- a/arch/powerpc/kernel/cpu_setup_6xx.S
+++ b/arch/powerpc/kernel/cpu_setup_6xx.S
@@ -17,7 +17,13 @@
#include <asm/cache.h>
_GLOBAL(__setup_cpu_603)
- b setup_common_caches
+ mflr r4
+BEGIN_FTR_SECTION
+ bl __init_fpu_registers
+END_FTR_SECTION_IFCLR(CPU_FTR_FPU_UNAVAILABLE)
+ bl setup_common_caches
+ mtlr r4
+ blr
_GLOBAL(__setup_cpu_604)
mflr r4
bl setup_common_caches