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authorKumar Gala <galak@kernel.crashing.org>2009-04-06 23:36:50 -0500
committerKumar Gala <galak@kernel.crashing.org>2009-04-07 01:36:30 -0500
commite9965577406a2148ade97b5e0ce7c448b4ba4ef6 (patch)
treec1291c2942e50af47c9391f6308d5f9c17377220 /arch/powerpc/mm
parent7281f5dc2c9582f3efaed9b367837ca6117d7b7f (diff)
powerpc: Add support for early tlbilx opcode
During the ISA 2.06 development the opcode for tlbilx changed and some early implementations used to old opcode. Add support for a MMU_FTR fixup to deal with this. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/mm')
-rw-r--r--arch/powerpc/mm/tlb_nohash_low.S14
1 files changed, 13 insertions, 1 deletions
diff --git a/arch/powerpc/mm/tlb_nohash_low.S b/arch/powerpc/mm/tlb_nohash_low.S
index 788b87c36f7..45fed369834 100644
--- a/arch/powerpc/mm/tlb_nohash_low.S
+++ b/arch/powerpc/mm/tlb_nohash_low.S
@@ -138,7 +138,11 @@ BEGIN_MMU_FTR_SECTION
andi. r3,r3,MMUCSR0_TLBFI@l
bne 1b
MMU_FTR_SECTION_ELSE
- PPC_TLBILX_ALL(0,0)
+ BEGIN_MMU_FTR_SECTION_NESTED(96)
+ PPC_TLBILX_ALL(0,r3)
+ MMU_FTR_SECTION_ELSE_NESTED(96)
+ PPC_TLBILX_ALL_EARLY(0,r3)
+ ALT_MMU_FTR_SECTION_END_NESTED_IFCLR(MMU_FTR_TLBILX_EARLY_OPCODE, 96)
ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX)
msync
isync
@@ -151,7 +155,11 @@ BEGIN_MMU_FTR_SECTION
wrteei 0
mfspr r4,SPRN_MAS6 /* save MAS6 */
mtspr SPRN_MAS6,r3
+ BEGIN_MMU_FTR_SECTION_NESTED(96)
PPC_TLBILX_PID(0,0)
+ MMU_FTR_SECTION_ELSE_NESTED(96)
+ PPC_TLBILX_PID_EARLY(0,0)
+ ALT_MMU_FTR_SECTION_END_NESTED_IFCLR(MMU_FTR_TLBILX_EARLY_OPCODE, 96)
mtspr SPRN_MAS6,r4 /* restore MAS6 */
wrtee r10
MMU_FTR_SECTION_ELSE
@@ -185,7 +193,11 @@ BEGIN_MMU_FTR_SECTION
mtspr SPRN_MAS1,r4
tlbwe
MMU_FTR_SECTION_ELSE
+ BEGIN_MMU_FTR_SECTION_NESTED(96)
PPC_TLBILX_VA(0,r3)
+ MMU_FTR_SECTION_ELSE_NESTED(96)
+ PPC_TLBILX_VA_EARLY(0,r3)
+ ALT_MMU_FTR_SECTION_END_NESTED_IFCLR(MMU_FTR_TLBILX_EARLY_OPCODE, 96)
ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX)
msync
isync