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authorIngo Molnar <mingo@elte.hu>2008-12-16 22:04:48 +0100
committerIngo Molnar <mingo@elte.hu>2008-12-16 22:04:48 +0100
commit78f902ccc597d6ce3e8d1477d70f2d79e960ba7a (patch)
treec6ceab663de16501d1dda1c1596fe2dacaaef8e3 /arch/powerpc/sysdev
parent9ee670fd87b7d69c8633b94c42aadcbbcb96f28e (diff)
parent8b1fae4e4200388b64dd88065639413cb3f1051c (diff)
Merge commit 'v2.6.28-rc8' into x86/doc
Diffstat (limited to 'arch/powerpc/sysdev')
-rw-r--r--arch/powerpc/sysdev/bestcomm/Kconfig9
-rw-r--r--arch/powerpc/sysdev/fsl_soc.c26
-rw-r--r--arch/powerpc/sysdev/mpic.c68
-rw-r--r--arch/powerpc/sysdev/xilinx_intc.c4
4 files changed, 93 insertions, 14 deletions
diff --git a/arch/powerpc/sysdev/bestcomm/Kconfig b/arch/powerpc/sysdev/bestcomm/Kconfig
index 57cc5656256..0b192a1c429 100644
--- a/arch/powerpc/sysdev/bestcomm/Kconfig
+++ b/arch/powerpc/sysdev/bestcomm/Kconfig
@@ -17,23 +17,20 @@ config PPC_BESTCOMM
answer Y or M. Otherwise say N.
config PPC_BESTCOMM_ATA
- tristate "Bestcomm ATA task support"
+ tristate
depends on PPC_BESTCOMM
- default n
help
This option enables the support for the ATA task.
config PPC_BESTCOMM_FEC
- tristate "Bestcomm FEC tasks support"
+ tristate
depends on PPC_BESTCOMM
- default n
help
This option enables the support for the FEC tasks.
config PPC_BESTCOMM_GEN_BD
- tristate "Bestcomm GenBD tasks support"
+ tristate
depends on PPC_BESTCOMM
- default n
help
This option enables the support for the GenBD tasks.
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index 01b884b2569..26ecb96f973 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -223,6 +223,8 @@ static int gfar_mdio_of_init_one(struct device_node *np)
if (ret)
return ret;
+ /* The gianfar device will try to use the same ID created below to find
+ * this bus, to coordinate register access (since they share). */
mdio_dev = platform_device_register_simple("fsl-gianfar_mdio",
res.start&0xfffff, &res, 1);
if (IS_ERR(mdio_dev))
@@ -394,6 +396,30 @@ static int __init gfar_of_init(void)
of_node_put(mdio);
}
+ /* Get MDIO bus controlled by this eTSEC, if any. Normally only
+ * eTSEC 1 will control an MDIO bus, not necessarily the same
+ * bus that its PHY is on ('mdio' above), so we can't just use
+ * that. What we do is look for a gianfar mdio device that has
+ * overlapping registers with this device. That's really the
+ * whole point, to find the device sharing our registers to
+ * coordinate access with it.
+ */
+ for_each_compatible_node(mdio, NULL, "fsl,gianfar-mdio") {
+ if (of_address_to_resource(mdio, 0, &res))
+ continue;
+
+ if (res.start >= r[0].start && res.end <= r[0].end) {
+ /* Get the ID the mdio bus platform device was
+ * registered with. gfar_data.bus_id is
+ * different because it's for finding a PHY,
+ * while this is for finding a MII bus.
+ */
+ gfar_data.mdio_bus = res.start&0xfffff;
+ of_node_put(mdio);
+ break;
+ }
+ }
+
ret =
platform_device_add_data(gfar_dev, &gfar_data,
sizeof(struct
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 8e3478c995e..1890fb085cd 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -563,6 +563,51 @@ static void __init mpic_scan_ht_pics(struct mpic *mpic)
#endif /* CONFIG_MPIC_U3_HT_IRQS */
+#ifdef CONFIG_SMP
+static int irq_choose_cpu(unsigned int virt_irq)
+{
+ cpumask_t mask = irq_desc[virt_irq].affinity;
+ int cpuid;
+
+ if (cpus_equal(mask, CPU_MASK_ALL)) {
+ static int irq_rover;
+ static DEFINE_SPINLOCK(irq_rover_lock);
+ unsigned long flags;
+
+ /* Round-robin distribution... */
+ do_round_robin:
+ spin_lock_irqsave(&irq_rover_lock, flags);
+
+ while (!cpu_online(irq_rover)) {
+ if (++irq_rover >= NR_CPUS)
+ irq_rover = 0;
+ }
+ cpuid = irq_rover;
+ do {
+ if (++irq_rover >= NR_CPUS)
+ irq_rover = 0;
+ } while (!cpu_online(irq_rover));
+
+ spin_unlock_irqrestore(&irq_rover_lock, flags);
+ } else {
+ cpumask_t tmp;
+
+ cpus_and(tmp, cpu_online_map, mask);
+
+ if (cpus_empty(tmp))
+ goto do_round_robin;
+
+ cpuid = first_cpu(tmp);
+ }
+
+ return get_hard_smp_processor_id(cpuid);
+}
+#else
+static int irq_choose_cpu(unsigned int virt_irq)
+{
+ return hard_smp_processor_id();
+}
+#endif
#define mpic_irq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq)
@@ -777,12 +822,18 @@ void mpic_set_affinity(unsigned int irq, cpumask_t cpumask)
struct mpic *mpic = mpic_from_irq(irq);
unsigned int src = mpic_irq_to_hw(irq);
- cpumask_t tmp;
+ if (mpic->flags & MPIC_SINGLE_DEST_CPU) {
+ int cpuid = irq_choose_cpu(irq);
+
+ mpic_irq_write(src, MPIC_INFO(IRQ_DESTINATION), 1 << cpuid);
+ } else {
+ cpumask_t tmp;
- cpus_and(tmp, cpumask, cpu_online_map);
+ cpus_and(tmp, cpumask, cpu_online_map);
- mpic_irq_write(src, MPIC_INFO(IRQ_DESTINATION),
- mpic_physmask(cpus_addr(tmp)[0]));
+ mpic_irq_write(src, MPIC_INFO(IRQ_DESTINATION),
+ mpic_physmask(cpus_addr(tmp)[0]));
+ }
}
static unsigned int mpic_type_to_vecpri(struct mpic *mpic, unsigned int type)
@@ -1220,6 +1271,7 @@ void __init mpic_set_default_senses(struct mpic *mpic, u8 *senses, int count)
void __init mpic_init(struct mpic *mpic)
{
int i;
+ int cpu;
BUG_ON(mpic->num_sources == 0);
@@ -1262,6 +1314,11 @@ void __init mpic_init(struct mpic *mpic)
mpic_pasemi_msi_init(mpic);
+ if (mpic->flags & MPIC_PRIMARY)
+ cpu = hard_smp_processor_id();
+ else
+ cpu = 0;
+
for (i = 0; i < mpic->num_sources; i++) {
/* start with vector = source number, and masked */
u32 vecpri = MPIC_VECPRI_MASK | i |
@@ -1272,8 +1329,7 @@ void __init mpic_init(struct mpic *mpic)
continue;
/* init hw */
mpic_irq_write(i, MPIC_INFO(IRQ_VECTOR_PRI), vecpri);
- mpic_irq_write(i, MPIC_INFO(IRQ_DESTINATION),
- 1 << hard_smp_processor_id());
+ mpic_irq_write(i, MPIC_INFO(IRQ_DESTINATION), 1 << cpu);
}
/* Init spurious vector */
diff --git a/arch/powerpc/sysdev/xilinx_intc.c b/arch/powerpc/sysdev/xilinx_intc.c
index b7aefd0d45c..a22e1a2df1a 100644
--- a/arch/powerpc/sysdev/xilinx_intc.c
+++ b/arch/powerpc/sysdev/xilinx_intc.c
@@ -107,8 +107,8 @@ xilinx_intc_init(struct device_node *np)
}
regs = ioremap(res.start, 32);
- printk(KERN_INFO "Xilinx intc at 0x%08LX mapped to 0x%p\n",
- res.start, regs);
+ printk(KERN_INFO "Xilinx intc at 0x%08llx mapped to 0x%p\n",
+ (unsigned long long) res.start, regs);
/* Setup interrupt controller */
out_be32(regs + XINTC_IER, 0); /* disable all irqs */