diff options
| author | David Gibson <david@gibson.dropbear.id.au> | 2007-09-07 13:23:53 +1000 |
|---|---|---|
| committer | Paul Mackerras <paulus@samba.org> | 2007-09-14 01:33:25 +1000 |
| commit | 2099172d61abda1b793b499bb8edcaac4de2cdae (patch) | |
| tree | 4b3bff327ad8e61fe5f71f9d399269c8db41220c /arch/powerpc | |
| parent | 3c607ce2a3213f33b8b6b854b5f7db876021e466 (diff) | |
[POWERPC] Document and implement an improved flash device binding for powerpc
This replaces the binding for flash chips in booting-without-of.txt
with an clarified and improved version. It also makes
drivers/mtd/maps/physmap_of.c recognize this new binding. Finally it
revises the Ebony device tree source to use the new binding as an
example.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Acked-by: Segher Boessenkool <segher@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc')
| -rw-r--r-- | arch/powerpc/boot/dts/ebony.dts | 30 |
1 files changed, 19 insertions, 11 deletions
diff --git a/arch/powerpc/boot/dts/ebony.dts b/arch/powerpc/boot/dts/ebony.dts index 37599bda550..bc259972aaa 100644 --- a/arch/powerpc/boot/dts/ebony.dts +++ b/arch/powerpc/boot/dts/ebony.dts @@ -138,13 +138,16 @@ interrupt-parent = <&UIC1>; small-flash@0,80000 { - device_type = "rom"; - compatible = "direct-mapped"; - probe-type = "JEDEC"; + compatible = "jedec-flash"; bank-width = <1>; - partitions = <0 80000>; - partition-names = "OpenBIOS"; reg = <0 80000 80000>; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "OpenBIOS"; + reg = <0 80000>; + read-only; + }; }; ds1743@1,0 { @@ -154,14 +157,19 @@ }; large-flash@2,0 { - device_type = "rom"; - compatible = "direct-mapped"; - probe-type = "JEDEC"; + compatible = "jedec-flash"; bank-width = <1>; - partitions = <0 380000 - 380000 80000>; - partition-names = "fs", "firmware"; reg = <2 0 400000>; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "fs"; + reg = <0 380000>; + }; + partition@380000 { + label = "firmware"; + reg = <380000 80000>; + }; }; ir@3,0 { |