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authorEugene Surovegin <ebs@ebshome.net>2005-09-03 15:55:53 -0700
committerLinus Torvalds <torvalds@evo.osdl.org>2005-09-05 00:06:00 -0700
commit3a0a401b40abe31b34673a190c57697e7eced149 (patch)
tree06f90cb48509877d6a162c63acfd452ab350abe4 /arch/ppc/platforms/4xx/ibm440gx.c
parent28fa031e765b808520173f750bafbade832ba909 (diff)
[PATCH] ppc32: add dcr_base field to ocp_func_mal_data
Add dcr_base field to ocp_func_mal_data. This is preparation step for the new EMAC driver. Signed-off-by: Eugene Surovegin <ebs@ebshome.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/ppc/platforms/4xx/ibm440gx.c')
-rw-r--r--arch/ppc/platforms/4xx/ibm440gx.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/ppc/platforms/4xx/ibm440gx.c b/arch/ppc/platforms/4xx/ibm440gx.c
index 1f38f42835b..956f45e4ef9 100644
--- a/arch/ppc/platforms/4xx/ibm440gx.c
+++ b/arch/ppc/platforms/4xx/ibm440gx.c
@@ -84,6 +84,7 @@ static struct ocp_func_mal_data ibm440gx_mal0_def = {
.txde_irq = 33, /* TX Descriptor Error IRQ */
.rxde_irq = 34, /* RX Descriptor Error IRQ */
.serr_irq = 32, /* MAL System Error IRQ */
+ .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */
};
OCP_SYSFS_MAL_DATA()