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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-11-09 15:16:52 -0800
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-11-09 15:16:52 -0800
commitc4888f9ffafe7db107b7eafb3a68eaeeff3779c3 (patch)
treed30da15f6b5d74c8c04fd92991af5e1615d95691 /arch/ppc/platforms/4xx/taishan.c
parente36aeee65d4db050bd8713537416a0a0632db079 (diff)
parent688016f4e2028e3c2c27e959ad001536e10ee2c5 (diff)
Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (37 commits) [POWERPC] EEH: Make sure warning message is printed [POWERPC] Make altivec code in swsusp_32.S depend on CONFIG_ALTIVEC [POWERPC] windfarm: Fix windfarm thread freezer interaction [POWERPC] Fix si_addr value on low level hash failures [POWERPC] Refresh ppc64_defconfig and enable pasemi-related options [POWERPC] pasemi: Update defconfig [POWERPC] iSeries: Fix ref counting in vio setup [POWERPC] ] Fix memset size error [POWERPC] Fix link errors for allyesconfig [POWERPC] iSeries_init_IRQ non-PCI tidy [POWERPC] Change fallocate to match unistd.h on powerpc [POWERPC] EEH: Avoid crash on null device [POWERPC] EEH: Drivers that need reset trump others [POWERPC] EEH: Clean up comments [POWERPC] Fix off-by-one error in setting decrementer on Book E/4xx (v2) [POWERPC] Fix switch_slb handling of 1T ESID values [POWERPC] Fix build failure when CONFIG_VIRT_CPU_ACCOUNTING is not defined [POWERPC] Include udbg.h when using udbg_printf [POWERPC] Fix cache line vs. block size confusion [POWERPC] Fix sysctl table check failure on PowerMac ...
Diffstat (limited to 'arch/ppc/platforms/4xx/taishan.c')
-rw-r--r--arch/ppc/platforms/4xx/taishan.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/ppc/platforms/4xx/taishan.c b/arch/ppc/platforms/4xx/taishan.c
index 888c492b4a4..f6a0c6650f3 100644
--- a/arch/ppc/platforms/4xx/taishan.c
+++ b/arch/ppc/platforms/4xx/taishan.c
@@ -316,7 +316,7 @@ taishan_early_serial_map(void)
gen550_init(0, &port);
/* Purge TLB entry added in head_44x.S for early serial access */
- _tlbie(UART0_IO_BASE);
+ _tlbie(UART0_IO_BASE, 0);
#endif
port.membase = ioremap64(PPC440GX_UART1_ADDR, 8);