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authorMatt Porter <mporter@kernel.crashing.org>2005-07-31 22:34:52 -0700
committerLinus Torvalds <torvalds@g5.osdl.org>2005-08-01 19:14:01 -0700
commitc9cf73aee140baa425429902aaed2c758401343f (patch)
tree7e28361e87950e7e66a453e4218745a4b0912119 /arch/ppc/syslib/ibm440gx_common.c
parente8be1c8e065691c332fd8e9bae70c7096a69c31d (diff)
[PATCH] ppc32: add 440ep support
Add PPC440EP core support. PPC440EP is a PPC440-based SoC with a classic PPC FPU and another set of peripherals. Signed-off-by: Wade Farnsworth <wfarnsworth@mvista.com> Signed-off-by: Matt Porter <mporter@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/ppc/syslib/ibm440gx_common.c')
-rw-r--r--arch/ppc/syslib/ibm440gx_common.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/ppc/syslib/ibm440gx_common.c b/arch/ppc/syslib/ibm440gx_common.c
index 4ad85e0e023..d4776af6a3c 100644
--- a/arch/ppc/syslib/ibm440gx_common.c
+++ b/arch/ppc/syslib/ibm440gx_common.c
@@ -34,6 +34,10 @@ void __init ibm440gx_get_clocks(struct ibm44x_clocks* p, unsigned int sys_clk,
u32 plld = CPR_READ(DCRN_CPR_PLLD);
u32 uart0 = SDR_READ(DCRN_SDR_UART0);
u32 uart1 = SDR_READ(DCRN_SDR_UART1);
+#ifdef CONFIG_440EP
+ u32 uart2 = SDR_READ(DCRN_SDR_UART2);
+ u32 uart3 = SDR_READ(DCRN_SDR_UART3);
+#endif
/* Dividers */
u32 fbdv = __fix_zero((plld >> 24) & 0x1f, 32);
@@ -96,6 +100,17 @@ bypass:
p->uart1 = ser_clk;
else
p->uart1 = p->plb / __fix_zero(uart1 & 0xff, 256);
+#ifdef CONFIG_440EP
+ if (uart2 & 0x00800000)
+ p->uart2 = ser_clk;
+ else
+ p->uart2 = p->plb / __fix_zero(uart2 & 0xff, 256);
+
+ if (uart3 & 0x00800000)
+ p->uart3 = ser_clk;
+ else
+ p->uart3 = p->plb / __fix_zero(uart3 & 0xff, 256);
+#endif
}
/* Issue L2C diagnostic command */