diff options
| author | Eugene Surovegin <ebs@ebshome.net> | 2006-04-25 01:22:44 -0700 |
|---|---|---|
| committer | Paul Mackerras <paulus@samba.org> | 2006-04-28 21:04:56 +1000 |
| commit | 30aacebed0f0619f23ce84df7c59ad033ca08d77 (patch) | |
| tree | fb32292e6804fdab515227a0b7d9722e9595d532 /arch/ppc/syslib/ibm440gx_common.h | |
| parent | 1269277a5e7c6d7ae1852e648a8bcdb78035e9fa (diff) | |
[PATCH] ppc32: add 440GX erratum 440_43 workaround
This patch adds workaround for PPC 440GX erratum 440_43. According to
this erratum spurious MachineChecks (caused by L1 cache parity) can
happen during DataTLB miss processing. We disable L1 cache parity
checking for 440GX rev.C and rev.F
Signed-off-by: Eugene Surovegin <ebs@ebshome.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/ppc/syslib/ibm440gx_common.h')
| -rw-r--r-- | arch/ppc/syslib/ibm440gx_common.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/ppc/syslib/ibm440gx_common.h b/arch/ppc/syslib/ibm440gx_common.h index a2ab9fab8e3..a03ec6022e8 100644 --- a/arch/ppc/syslib/ibm440gx_common.h +++ b/arch/ppc/syslib/ibm440gx_common.h @@ -29,6 +29,10 @@ void ibm440gx_get_clocks(struct ibm44x_clocks*, unsigned int sys_clk, unsigned int ser_clk) __init; +/* common 440GX platform init */ +void ibm440gx_platform_init(unsigned long r3, unsigned long r4, unsigned long r5, + unsigned long r6, unsigned long r7) __init; + /* Enable L2 cache */ void ibm440gx_l2c_enable(void) __init; |