diff options
| author | Russ Anderson <rja@sgi.com> | 2007-10-31 11:10:38 -0500 |
|---|---|---|
| committer | Tony Luck <tony.luck@intel.com> | 2007-11-06 15:40:31 -0800 |
| commit | 1f3b6045f783ee394076ad6dba2d72ecaaecd243 (patch) | |
| tree | c20820794846f45db619991d0ddc26832ccf75e8 /arch/ppc/syslib/prep_nvram.c | |
| parent | adb34022eb7a11126fecef6b5abb4741a17360c6 (diff) | |
[IA64] Disable/re-enable CPE interrupts on Altix
When the CPE handler encounters too many CPEs (such as a solid single
bit memory error), it sets up a polling timer and disables the CPE
interrupt (to avoid excessive overhead logging the stream of single
bit errors). disable_irq_nosync() calls chip->disable() to provide
a chipset specifiec interface for disabling the interrupt. This patch
adds the Altix specific support to disable and re-enable the CPE interrupt.
Signed-off-by: Russ Anderson (rja@sgi.com)
Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ppc/syslib/prep_nvram.c')
0 files changed, 0 insertions, 0 deletions