diff options
| author | Joachim Foerster <mls.JOFT@gmx.de> | 2007-11-08 03:14:15 +1100 |
|---|---|---|
| committer | Josh Boyer <jwboyer@linux.vnet.ibm.com> | 2007-11-19 08:14:18 -0600 |
| commit | 221fe3a4be6aa742693f3a82824235c82d41846f (patch) | |
| tree | fff0c0ada61d4f967afe6dd4020a3357a0c4e88b /arch/ppc | |
| parent | ed08aff7bb1a275525c024dcba2e7127e77d4edd (diff) | |
[POWERPC] Xilinx: Register AC97 Controller Reference with the platform bus
Add AC97 platform bus registration for Xilinx Virtex platforms.
Signed-off-by: Joachim Foerster <JOFT@gmx.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'arch/ppc')
| -rw-r--r-- | arch/ppc/syslib/virtex_devices.c | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/ppc/syslib/virtex_devices.c b/arch/ppc/syslib/virtex_devices.c index ace4ec08de5..f658ff3b389 100644 --- a/arch/ppc/syslib/virtex_devices.c +++ b/arch/ppc/syslib/virtex_devices.c @@ -87,6 +87,29 @@ }, \ } +#define XPAR_AC97_CONTROLLER_REFERENCE(num) { \ + .name = "ml403_ac97cr", \ + .id = num, \ + .num_resources = 3, \ + .resource = (struct resource[]) { \ + { \ + .start = XPAR_OPB_AC97_CONTROLLER_REF_##num##_BASEADDR, \ + .end = XPAR_OPB_AC97_CONTROLLER_REF_##num##_HIGHADDR, \ + .flags = IORESOURCE_MEM, \ + }, \ + { \ + .start = XPAR_OPB_INTC_0_OPB_AC97_CONTROLLER_REF_##num##_PLAYBACK_INTERRUPT_INTR, \ + .end = XPAR_OPB_INTC_0_OPB_AC97_CONTROLLER_REF_##num##_PLAYBACK_INTERRUPT_INTR, \ + .flags = IORESOURCE_IRQ, \ + }, \ + { \ + .start = XPAR_OPB_INTC_0_OPB_AC97_CONTROLLER_REF_##num##_RECORD_INTERRUPT_INTR, \ + .end = XPAR_OPB_INTC_0_OPB_AC97_CONTROLLER_REF_##num##_RECORD_INTERRUPT_INTR, \ + .flags = IORESOURCE_IRQ, \ + }, \ + }, \ +} + /* UART 8250 driver platform data table */ struct plat_serial8250_port virtex_serial_platform_data[] = { #if defined(XPAR_UARTNS550_0_BASEADDR) @@ -173,6 +196,14 @@ struct platform_device virtex_platform_devices[] = { #if defined(XPAR_TFT_3_BASEADDR) XPAR_TFT(3), #endif + + /* AC97 Controller Reference instances */ +#if defined(XPAR_OPB_AC97_CONTROLLER_REF_0_BASEADDR) + XPAR_AC97_CONTROLLER_REFERENCE(0), +#endif +#if defined(XPAR_OPB_AC97_CONTROLLER_REF_1_BASEADDR) + XPAR_AC97_CONTROLLER_REFERENCE(1), +#endif }; /* Early serial support functions */ |