diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-08-01 10:53:43 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-08-01 10:53:43 -0700 |
commit | 00e9028a95fb8a4d79f2fb695a853f33ea7d3b57 (patch) | |
tree | 2dea2ae498a6ce57de8890e87185aca5e9f3ad2d /arch/sh/include/cpu-sh4/cpu/dma.h | |
parent | 57b1494d2ba544c62673234da6115c21fac27ffc (diff) | |
parent | 7cb93181629c613ee2b8f4ffe3446f8003074842 (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (28 commits)
mm/hugetlb.c must #include <asm/io.h>
video: Fix up hp6xx driver build regressions.
sh: defconfig updates.
sh: Kill off stray mach-rsk7203 reference.
serial: sh-sci: Fix up SH7760/SH7780/SH7785 early printk regression.
sh: Move out individual boards without mach groups.
sh: Make sure AT_SYSINFO_EHDR is exposed to userspace in asm/auxvec.h.
sh: Allow SH-3 and SH-5 to use common headers.
sh: Provide common CPU headers, prune the SH-2 and SH-2A directories.
sh/maple: clean maple bus code
sh: More header path fixups for mach dir refactoring.
sh: Move out the solution engine headers to arch/sh/include/mach-se/
sh: I2C fix for AP325RXA and Migo-R
sh: Shuffle the board directories in to mach groups.
sh: dma-sh: Fix up dreamcast dma.h mach path.
sh: Switch KBUILD_DEFCONFIG to shx3_defconfig.
sh: Add ARCH_DEFCONFIG entries for sh and sh64.
sh: Fix compile error of Solution Engine
sh: Proper __put_user_asm() size mismatch fix.
sh: Stub in a dummy ENTRY_OFFSET for uImage offset calculation.
...
Diffstat (limited to 'arch/sh/include/cpu-sh4/cpu/dma.h')
-rw-r--r-- | arch/sh/include/cpu-sh4/cpu/dma.h | 65 |
1 files changed, 65 insertions, 0 deletions
diff --git a/arch/sh/include/cpu-sh4/cpu/dma.h b/arch/sh/include/cpu-sh4/cpu/dma.h new file mode 100644 index 00000000000..235b7cd1fc9 --- /dev/null +++ b/arch/sh/include/cpu-sh4/cpu/dma.h @@ -0,0 +1,65 @@ +#ifndef __ASM_CPU_SH4_DMA_H +#define __ASM_CPU_SH4_DMA_H + +#define DMAOR_INIT ( 0x8000 | DMAOR_DME ) + +/* SH7751/7760/7780 DMA IRQ sources */ +#define DMTE0_IRQ 34 +#define DMTE1_IRQ 35 +#define DMTE2_IRQ 36 +#define DMTE3_IRQ 37 +#define DMTE4_IRQ 44 +#define DMTE5_IRQ 45 +#define DMTE6_IRQ 46 +#define DMTE7_IRQ 47 +#define DMAE_IRQ 38 + +#ifdef CONFIG_CPU_SH4A +#define SH_DMAC_BASE 0xfc808020 + +#define CHCR_TS_MASK 0x18 +#define CHCR_TS_SHIFT 3 + +#include <cpu/dma-sh7780.h> +#else +#define SH_DMAC_BASE 0xffa00000 + +/* Definitions for the SuperH DMAC */ +#define TM_BURST 0x0000080 +#define TS_8 0x00000010 +#define TS_16 0x00000020 +#define TS_32 0x00000030 +#define TS_64 0x00000000 + +#define CHCR_TS_MASK 0x70 +#define CHCR_TS_SHIFT 4 + +#define DMAOR_COD 0x00000008 + +/* + * The SuperH DMAC supports a number of transmit sizes, we list them here, + * with their respective values as they appear in the CHCR registers. + * + * Defaults to a 64-bit transfer size. + */ +enum { + XMIT_SZ_64BIT, + XMIT_SZ_8BIT, + XMIT_SZ_16BIT, + XMIT_SZ_32BIT, + XMIT_SZ_256BIT, +}; + +/* + * The DMA count is defined as the number of bytes to transfer. + */ +static unsigned int ts_shift[] __maybe_unused = { + [XMIT_SZ_64BIT] = 3, + [XMIT_SZ_8BIT] = 0, + [XMIT_SZ_16BIT] = 1, + [XMIT_SZ_32BIT] = 2, + [XMIT_SZ_256BIT] = 5, +}; +#endif + +#endif /* __ASM_CPU_SH4_DMA_H */ |