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authorMagnus Damm <damm@igel.co.jp>2008-12-25 18:17:26 +0900
committerPaul Mundt <lethal@linux-sh.org>2009-01-27 14:49:10 +0900
commit3292094e88ce6b76714dad8ec4b43d7c5c12ada2 (patch)
tree0469a3523b1794a9ecb9f5df99ce3d726d442b2a /arch/sh/include
parent0fc64cc0a27288e77ee8e12648d59632649371fc (diff)
sh: lockless gpio_set_value()
This patch optimizes the gpio data register handling for gpio_set_value(). Instead of using the good old spinlock-plus-read-modify-write strategy we now use a shadow register and atomic operations. This improves the bitbanging mmc performance on Migo-R from 26 Kbytes/s to 40 Kbytes/s. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/include')
-rw-r--r--arch/sh/include/asm/gpio.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/sh/include/asm/gpio.h b/arch/sh/include/asm/gpio.h
index 942fefa61c7..46a6d7914df 100644
--- a/arch/sh/include/asm/gpio.h
+++ b/arch/sh/include/asm/gpio.h
@@ -59,7 +59,7 @@ struct pinmux_cfg_reg {
.enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)]) \
struct pinmux_data_reg {
- unsigned long reg, reg_width;
+ unsigned long reg, reg_width, reg_shadow;
pinmux_enum_t *enum_ids;
};